Patent Assignment
Reel/Frame 032093/0430
Release of Security Interest
Recorded: 2014-01-30
Pages: 7
Assignor
COMERICA BANK
Executed: 2014-01-30
Assignee
BAY MICROSYSTEMS, INC.
2055 GATEWAY PLACE, SUITE 650, SAN JOSE, CALIFORNIA, 95110
Covered Properties
(40)
Deserializer
Interlocking Sonet/Sdh Network Architecture
Hitless Re-Routing in Composite Switches
Fault-tolerant mesh network comprising interlocking ring networks
Application:
09/969,703 →
Publication:
US 2003/0086368
Composite Add/Drop Multiplexor
Switching Network
Serializer
System and Method for Shifting the Phase of a Clock Signal
Patent:
6,690,223 →
Application:
10/033,200 →
Memory Management System and Algorithm for Network Processor Architecture
Patent:
7,006,505 →
Application:
10/035,571 →
Forward Error Correction and Framing Protocol
Coherent Provisioning of Multiple Traffic Paths in Transport Networks
Simplifying the Layout of Printed Circuit Boards
Redundant Add/Drop Multiplexor
Bi-Directional Serializer/Deserializer with Discretionary Loop-Back
Add/Drop Multiplexor with Aggregate Serializer/Deserializers
Expansion of Telecommunications Networks with Automatic Protection Switching
Composite Add/Drop Multiplexor with Crisscross Loop Back
Multiplexed Automatic Protection Switching Channels
Hitless Reconfiguation of a Switching Network
Reference Timing Architecture
Overhead engine for telecommunications nodes
Application:
10/193,579 →
Publication:
US 2004/0008708
Overhead processing in telecommunications nodes
Application:
10/193,580 →
Publication:
US 2004/0008673
Multiport Overhead Cell Processor for Telecommunications Nodes
Hierarchical finite-state machines
Application:
10/194,603 →
Publication:
US 2004/0008701
Differentiated Services for a Network Processor
Vertical Instruction and Data Processing in a Network Processor Architecture
Robust Mesh Transport Network Comprising Conjoined Rings
Network Processor Architecture
Data Forwarding Engine
Uniform impedance printed circuit board
Application:
10/446,361 →
Publication:
US 2004/0238213
Economically Expansible Switching Network
Compact and hitlessly-resizable multi-channel queue
Application:
11/103,978 →
Publication:
US 2006/0230052
Highly-Scalable Hardware-Based Traffic Management Within a Network Processor Integrated Circuit
Integrated Circuit Device Interface with Parallel Scrambler and Descrambler
Application:
11/935,303 →
Publication:
US 2008/0130891
Network Processor Integrated Circuit with a Software Programmable Search Engine Communications Module
Network Processor Architecture
Programmable Hardware-Based Traffic Policing
Clock Regeneration for Optical Communications
Network Processor Architecture
System and Method for Grouping Multiple Processors
Application:
13/219,930 →
Publication:
US 2011/0314473
Related Assignments
(22)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Jul 20, 2001
From: PITIO, WALTER MICHAEL; SHUGARD, DONALD DAVID
To: PARAMA NETWORKS, INC.
Reel/Frame 012020/0482 →
Assignment of Assignor's Interest
Jul 20, 2001
From: LIMAYE, PRADEEP SKRIKRISHNA; NANDU, HEENA
To: PARAMA NETWORKS, INC.
Reel/Frame 012016/0416 →
Assignment of Assignor's Interest
Oct 22, 2001
From: BLESZYNSKI, RYSZARD; TRINH, MAN D.
To: BAY MICROSYSTEMS, INC.
Reel/Frame 012445/0538 →
Assignment of Assignor's Interest
Dec 5, 2001
From: PITIO, WALTER MICHAEL
To: PARAMA NETWORKS, INC.
Reel/Frame 012371/0137 →
Assignment of Assignor's Interest
Dec 27, 2001
From: WAN, SSU-AI
To: BAY MICROSYSTEMS, INC.
Reel/Frame 012441/0511 →
Assignment of Assignor's Interest
Jan 9, 2002
From: PITIO, WALTER MICHAEL
To: PARAMA NETWORKS, INC.
Reel/Frame 012458/0779 →
Assignment of Assignor's Interest
Jan 23, 2002
From: LOEFFLER-LEJENUE, CHRISTOPH DOMINIQUE
To: PARAMA NETWORKS, INC.
Reel/Frame 012511/0015 →
Assignment of Assignor's Interest
Feb 20, 2002
From: ARBEL, YGAL; CAULK, ROBERT LOUIS; LOEFFLER-LEJEUNE, CHRISTOPH DOMINIQUE
To: PARAMA NETWORKS, INC.
Reel/Frame 012656/0041 →
Assignment of Assignor's Interest
Mar 29, 2002
From: BARNES, DAVID ANDREW; PITIO, WALTER MICHAEL
To: PARAMA NETWORKS, INC.
Reel/Frame 012753/0299 →
Assignment of Assignor's Interest
Mar 29, 2002
From: PITIO, WALTER MICHAEL
To: PARAMA NETWORKS, INC.
Reel/Frame 012753/0287 →
Assignment of Assignor's Interest
Mar 29, 2002
From: PITIO, WALTER MICHAEL
To: PARAMA NETWORKS, INC.
Reel/Frame 012759/0401 →
Assignment of Assignor's Interest
Mar 29, 2002
From: PITIO, WALTER MICHAEL
To: PARAMA NETWORKS, INC.
Reel/Frame 012759/0489 →
Assignment of Assignor's Interest
Mar 29, 2002
From: BARNES, DAVID ANDREW; PITIO, WALTER MICHAEL
To: PARAMA NETWORKS, INC.
Reel/Frame 012759/0506 →
Assignment of Assignor's Interest
Mar 29, 2002
From: DANIELL, PIERS JOHN; NANDU, HEENA; MURARI, SRINIVASAN
To: PARAMA NETWORKS, INC.
Reel/Frame 012759/0511 →
Assignment of Assignor's Interest
Apr 4, 2002
From: LIMAYE, PRADEEP SHRIKRISHNA; NANDU, HEENA; MURARI, SRINIVASAN
To: PARAMA NETWORKS, INC.
Reel/Frame 012779/0795 →
Assignment of Assignor's Interest
Apr 8, 2002
From: PITIO, WALTER MICHAEL
To: PARAMA NETWORKS, INC.
Reel/Frame 012790/0914 →
Assignment of Assignor's Interest
Apr 12, 2002
From: LIMAYE, PRADEEP SHRIKRISHNA; RAGURAM, SASISEKHARAN
To: PARAMA NETWORKS, INC.
Reel/Frame 012810/0927 →
Assignment of Assignor's Interest
May 13, 2002
From: RAGURAM, SASISEKHARAN; SRINIVASAN, SANTHANAM
To: PARAMA NETWORKS, INC.
Reel/Frame 012889/0284 →
Security Agreement
Nov 25, 2003
From: BAY MICROSYSTEMS, INC.
To: COMERICA BANK
Reel/Frame 016482/0071 →
Corrective Assignment to Correct the Serial Number and Filing Date of the Assignment Previously Recorded on Reel 012458 Frame 0779. Assignor Hereby Confirms the Serial Number and Filing Date Were Wrong on the Original Assignment.
May 13, 2005
From: PITIO, WALTER MICHAEL
To: PARAMA NETWORKS, INC.
Reel/Frame 016295/0805 →
Assignment of Assignor's Interest
Sep 14, 2005
From: PARAMA NETWORKS, INC.
To: BAY MICROSYSTEMS, INC.
Reel/Frame 016793/0365 →
Security Agreement
Dec 30, 2008
From: BAY MICROSYSTEMS, INC.
To: COMERICA BANK
Reel/Frame 022043/0030 →