Patent Assignment
Reel/Frame 032897/0001
Assignment of Assignor's Interest
Recorded: 2014-05-15
Pages: 125
Assignor
ELPIDA MEMORY, INC.
Executed: 2013-07-26
Assignee
PS4 LUXCO S.A.R.L.
208, VAL DES BONS MALADES, LUXEMBOURG, L-2121, LUXEMBOURG
Covered Properties
(25)
Semiconductor Memory System
Patent:
5,598,373 →
Application:
08/476,765 →
Semiconductor Memory Wherein a Signal Selectively Substitutes a Redundant Memory Cell Link for a Faulty Ordinary Memory Cell Link
Patent:
5,633,826 →
Application:
08/561,261 →
Semiconductor Memory Device Incorporating Redundancy Memory Cells
Patent:
5,570,318 →
Application:
08/563,940 →
Method of Write to Graphic Memory Where Memory Cells Designated by Plurality of Addresses Selected Simultaneously for One Row Address Are Written
Patent:
5,704,059 →
Application:
08/683,218 →
Data Transfer System for an Integrated Circuit, Capable of Shortening a Data Transfer Cycle
Patent:
5,748,018 →
Application:
08/790,800 →
Semiconductor Integrated Circuit Device Having Synchronous Function with a Plurality of External Clocks
Patent:
5,886,918 →
Application:
09/123,005 →
Refresh Control Circuit for Ics with a Memory Array
Memory Circuit with Flexible Bitline-Related and/or Wordline-Related Defect Memory Cell Substitution
Semiconductor Device
Semiconductor Device
Semiconductor Device, Semiconductor Device Testing Method, and Data Processing System
Semiconductor Device and Information Processing System Including the Same
Semiconductor Device, Information Processing System Including Same, and Controller for Controlling Semiconductor Device
Semiconductor Memory Module
Semiconductor Device Having Optical Fuse and Electrical Fuse
Semiconductor Device and Test Method Thereof
Semiconductor Device Having Data Bus
Semiconductor Device Including Plural Chips Stacked to Each Other
Semiconductor Device Including Plural Chips Stacked to Each Other
Semiconductor Device Having Redundant Bit Line Provided to Replace Defective Bit Line
Semiconductor Device Having Plural Penetration Electrodes Penetrating Through Semiconductor Substrate and Testing Method Thereof
Semiconductor Device Based on Power Gating in Multilevel Wiring Structure
Semiconductor Device Including Plural Chips Stacked to Each Other
Stacked Semiconductor Chips Having Circuit Element Provided with Each of the Semiconductor Chips
Semiconductor Device Having Plural Circuit Blocks Operating at the Same Timing
Related Assignments
(8)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Feb 28, 2011
From: IDE, AKIRA
To: ELPIDA MEMORY, INC.
Reel/Frame 025941/0877 →
Security Agreement
May 15, 2012
From: ELPIDA MEMORY, INC.
To: APPLE INC.
Reel/Frame 028209/0477 →
Security Agreement
Jul 29, 2013
From: PS4 LUXCO S.A.R.L.
To: ELPIDA MEMORY INC.
Reel/Frame 032414/0261 →
Release of Security Interest
Feb 24, 2014
From: APPLE, INC
To: ELPIDA MEMORY, INC.
Reel/Frame 032331/0637 →
Change of Name
Aug 24, 2016
From: PS5 LUXCO S.A.R.L.
To: LONGITUDE SEMICONDUCTOR S.A.R.L.
Reel/Frame 039793/0880 →
Assignment of Assignor's Interest
Aug 24, 2016
From: PS4 LUXCO S.A.R.L.
To: PS5 LUXCO S.A.R.L.
Reel/Frame 039818/0506 →
Assignment of Assignor's Interest
Aug 21, 2018
From: LONGITUDE SEMICONDUCTOR S.A.R.L.
To: LONGITUDE LICENSING LIMITED
Reel/Frame 046865/0667 →
Assignment of Assignor's Interest
Aug 21, 2018
From: LONGITUDE SEMICONDUCTOR S.A.R.L.
To: LONGITUDE LICENSING LIMITED
Reel/Frame 046863/0001 →