IP Library Granted Patent US 6,856,788
Granted Patent B2
US 6,856,788 · App. 09/839,107 · Granted Feb 15, 2005

Wireless IC interconnection method and system

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Quick Facts
Patent No.
US 6,856,788
App. No.
09/839,107
Granted
Feb 15, 2005
Kind
B2
Abstract

A wireless IC interconnect system and method facilitates interconnections between first and second IC locations via a wireless transmission medium; the IC locations may be on the same chip or on separate chips. A signal to be conveyed is modulated, and the modulated signal is capacitively coupled to the wireless transmission medium—preferably a properly terminated microstrip transmission line (MTL) or a coplanar waveguide (CPW). The modulated signal is capacitively coupled from the wireless medium to a receiver which demodulates the modulated signal and provides the demodulated signal to the second IC location. In a preferred embodiment, the wireless transmission system conveys numerous signals simultaneously, with the signals modulated and demodulated with multiple access algorithms such as code-division (CDMA) and/or frequency-division (FDMA) multiple access algorithms. The interconnection system can be made reconfigurable, with the destinations of the modulated signals changed by reprogramming associated address codes.

Claims (92)

1. A wireless integrated circuit (IC) interconnection system, comprising:

a guided medium,

a transmitter which modulates a signal to be conveyed from a first IC location to a second IC location and provides said modulated signal at an output,

a first capacitive coupler which capacitively couples said modulated signal from said transmitter output to said wireless transmission medium,

a second capacitive coupler which capacitively couples said modulated signal from said wireless transmission medium to a receiver, said wireless transmission medium propagating said modulated signal from said first capacitive coupler to said second capacitive coupler, and

a receiver which demodulates said modulated signal and provides said demodulated signal to said second IC location,

wherein said guided medium is a microstrip transmission line (MTL) having a characteristic impedance Z C , said MTL terminated at both ends with an impedance equal to Z C .

2. A wireless integrated circuit (IC) interconnection system, comprising:

a guided medium,

a transmitter which modulates a signal to be conveyed from a first IC location to a second IC location and provides said modulated signal at an output,

a first capacitive coupler which capacitively couples said modulated signal from said transmitter output to said wireless transmission medium,

a second capacitive coupler which capacitively couples said modulated signal from said wireless transmission medium to a receiver, said wireless transmission medium propagating said modulated signal from said first capacitive coupler to said second capacitive coupler, and

a receiver which demodulates said modulated signal and provides said demodulated signal to said second IC location,

wherein said guided medium is a coplanar waveguide (CPW) having a characteristic impedance Z C , said CPW terminated at both ends with an impedance equal to Z C .

3. A wireless integrated circuit (IC) interconnection system, comprising:

a wireless transmission medium,

a plurality of transmitters, each of which modulates a respective signal to be conveyed from a first IC location to a second IC location and provides said modulated signal at an output,

a first plurality of capacitive couplers, each of which capacitively couples a respective one of said modulated signals from its respective transmitter output to said wireless transmission medium,

a second plurality of capacitive couplers, each of which capacitively couples said modulated signals from said wireless transmission medium to a respective receiver, said wireless transmission medium propagating said modulated signals from said first plurality of capacitive couplers to said second plurality of capacitive couplers, and

a plurality of receivers, each of which demodulates a respective one of said modulated signals and provides said demodulated signal to said second IC location,

wherein said wireless transmission medium is a microstrip transmission line (MTL) having a characteristic impedance Z C , said MTL terminated at both ends with an impedance equal to Z C .

4. A wireless integrated circuit (IC) interconnection system, comprising:

a wireless transmission medium,

a plurality of transmitters, each of which modulates a respective signal to be conveyed from a first IC location to a second IC location and provides said modulated signal at an output,

a first plurality of capacitive couplers, each of which capacitively couples a respective one of said modulated signals from its respective transmitter output to said wireless transmission medium,

a second plurality of capacitive couplers, each of which capacitively couples said modulated signals from said wireless transmission medium to a respective receiver, said wireless transmission medium propagating said modulated signals from said first plurality of capacitive couplers to said second plurality of capacitive couplers, and

a plurality of receivers, each of which demodulates a respective one of said modulated signals and provides said demodulated signal to said second IC location,

wherein said wireless transmission medium is a coplanar waveguide (CPW) having a characteristic impedance Z C , said CPW terminated at both ends with an impedance equal to Z C .

5. A method of conveying a signal from a first integrated circuit (IC) location to a second IC location, comprising:

modulating said signal from said first IC location,

capacitively coupling said modulated signal to a guided medium,

propagating said capacitively coupled modulated signal through said guided medium,

capacitively coupling said propagated modulated signal from said guided medium, and

demodulating said modulated signal capacitively coupled from said guided medium and providing said demodulated signal to said second IC location,

wherein said guided medium is a microstrip transmission line (MTL) having a characteristic impedance Z C , said MTL terminated at both ends with an impedance equal to Z C .

6. A method of conveying a signal from a first integrated circuit (IC) location to a second IC location, comprising:

modulating said signal from said first IC location,

capacitively coupling said modulated signal to a guided medium,

propagating said capacitively coupled modulated signal through said guided medium,

capacitively coupling said propagated modulated signal from said guided medium, and

demodulating said modulated signal capacitively coupled from said guided medium and providing said demodulated signal to said second IC location,

wherein said guided medium is a coplanar waveguide (CPW) having a characteristic impedance Z C , said CPW terminated at both ends with an impedance equal to Z C .

7. A method of conveying a plurality of signals from respective first integrated circuit (IC) locations to respective second IC locations, comprising:

modulating each of said signals from said first IC locations,

capacitively coupling each of said modulated signals to a wireless transmission medium,

propagating said capacitively coupled modulated signals through said wireless transmission medium,

capacitively coupling said propagated modulated signals from said wireless transmission medium,

demodulating each of said modulated signals capacitively coupled from said wireless transmission medium and providing said demodulated signals to said second IC locations,

wherein said wireless transmission medium is a microstrip transmission line (MTL) or a coplanar waveguide (CPW) having a characteristic impedance Z C , said MTL or CPW terminated at both ends with an impedance equal to Z C .

8. The method of claim 7 , wherein said signals from said first IC locations are modulated and said modulated signals are demodulated with a frequency-division multiple access (FDMA) algorithm.

9. The method of claim 8 , further comprising bandpass filtering each of said modulated signals prior to their being capacitively coupled to said wireless transmission medium, and bandpass filtering each of said modulated signals capacitively coupled from said wireless transmission medium prior to their being demodulated.

10. The method of claim 7 , wherein said signals from said first IC locations are modulated and said modulated signals are demodulated with a code-division multiple access (CDMA) algorithm.

11. The method of claim 10 , wherein each of said modulated signals has an associated programmable orthogonal address code such that the destinations of said modulated signals can be changed by reprogramming said address codes.

12. The method of claim 7 , wherein said signals from said first IC locations are modulated with a frequency-division multiple access (FDMA) algorithm and a code-division multiple access (CDMA) algorithm.

13. The method of claim 12 , wherein said FDMA modulation allocates said signals to be conveyed into distinct frequency bands, each of which carries multiple ones of said modulated signals, and said CDMA algorithm further modulates each of said FDMA-modulated signals within each frequency band.

14. A wireless integrated circuit (IC) interconnection system, comprising:

a guided medium,

a transmitter which modulates a signal to be conveyed from a first IC location to a second IC location and provides said modulated signal at an output,

a first capacitive coupler which capacitively couples said modulated signal from said transmitter output to said wireless transmission medium,

a second capacitive coupler which capacitively couples said modulated signal from said wireless transmission medium to a receiver, said wireless transmission medium propagating said modulated signal from said first capacitive coupler to said second capacitive coupler, and

a receiver which demodulates said modulated signal and provides said demodulated signal to said second IC location,

wherein said guided medium is a microstrip transmission line (MTL) or a coplanar waveguide (CPW) having a characteristic impedance Z C , said MTL or CPW terminated at both ends with an impedance equal to Z C .

15. The wireless IC interconnection system of claim 14 , wherein said first and second IC locations are on a common IC die such that said interconnection system provides an intra-chip interconnection.

16. The wireless IC interconnection system of claim 14 , wherein said first and second IC locations are on respective IC dies such that said interconnection system provides an inter-chip interconnection.

17. The wireless IC interconnection system of claim 14 , wherein said transmitter modulates said signal to be conveyed with an analog carrier.

18. The wireless IC interconnection system of claim 14 , wherein said transmitter modulates said signal to be conveyed with a digital carrier.

19. A wireless integrated circuit (IC) interconnection system, comprising:

a wireless transmission medium,

a plurality of transmitters, each of which modulates a respective signal to be conveyed from a first IC location to a second IC location and provides said modulated signal at an output,

a first plurality of capacitive couplers, each of which capacitively couples a respective one of said modulated signals from its respective transmitter output to said wireless transmission medium,

a second plurality of capacitive couplers, each of which capacitively couples said modulated signals from said wireless transmission medium to a respective receiver, said wireless transmission medium propagating said modulated signals from said first plurality of capacitive couplers to said second plurality of capacitive couplers, and

a plurality of receivers, each of which demodulates a respective one of said modulated signals and provides said demodulated signal to said second IC location,

wherein said wireless transmission medium is a microstrip transmission line (MTL) or a coplanar waveguide (CPW) having a characteristic impedance Z C , said MTL or CPW terminated at both ends with an impedance equal to Z C .

20. The wireless IC interconnection system of claim 19 , wherein each of said first and second IC locations are on a common IC die such that said interconnection system provides intra-chip interconnections.

21. The wireless IC interconnection system of claim 19 , wherein at least some of said first and second IC locations are on different IC dies such that said interconnection system provides inter-chip interconnections.

22. The wireless IC interconnection system of claim 19 , wherein said modulated signals and said demodulated signals are modulated and demodulated with a frequency-division multiple access (FDMA) algorithm.

23. The wireless IC interconnection system of claim 22 , wherein each of said transmitters includes a respective bandpass filter which is arranged to filter a respective one of said modulated signals prior to its being capacitively coupled to said wireless transmission medium, and each of said receivers includes a respective bandpass filter which is arranged to filter a respective one of said received signals prior to its being demodulated.

24. The wireless IC interconnection system of claim 19 , wherein said modulated signals and said demodulated signals are modulated and demodulated with a code-division multiple access (CDMA) algorithm.

25. The wireless IC interconnection system of claim 24 , wherein each of said modulated signals has an associated programmable orthogonal address code such that the destinations of said modulated signals can be changed by reprogramming said address codes.

26. The wireless IC interconnection system of claim 19 , wherein said modulated signals are modulated with a frequency-division multiple access (EDMA) algorithm and a code-division multiple access (CDMA) algorithm.

27. The wireless IC interconnection system of claim 26 , wherein said system is arranged such that said FDMA modulation allocates said signals to be conveyed into distinct frequency bands, each of which carries multiple ones of said modulated signals, and said CDMA algorithm further modulates each of said FDMA-modulated signals within each frequency band.

28. A method of conveying a signal from a first integrated circuit (IC) location to a second IC location, comprising:

modulating said signal from said first IC location,

capacitively coupling said modulated signal to a guided medium,

propagating said capacitively coupled modulated signal through said guided medium,

capacitively coupling said propagated modulated signal from said guided medium, and

demodulating said modulated signal capacitively coupled from said guided medium and providing said demodulated signal to said second IC location,

wherein said guided medium is a microstrip transmission line (MTL) or a coplanar waveguide (CPW) having a characteristic impedance Z C , said MTL or CPW terminated at both ends with an impedance equal to Z C .

29. The method of claim 28 , wherein said first and second IC locations are on a common IC die such that said method provides an intra-chip interconnection.

30. The method of claim 28 , wherein said first and second IC locations are on respective IC dies such that said method provides an inter-chip interconnection.

31. The method of claim 28 , wherein said modulating comprises mixing said signal from said first IC location with an analog carrier.

32. The method of claim 28 , wherein said modulating comprises mixing said signal from said first IC location with a digital carrier.

Assignments (16)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: SILICON STORAGE TECHNOLOGY, INC.
Reel/Frame 059687/0344 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: SILICON STORAGE TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041675/0316 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 4, 2007
From: MASTEK INTERNATIONAL
To: SILICON STORAGE TECHNOLOGY, INC.
Reel/Frame 019920/0262 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2001
From: CHANG, MAU-CHUNG F.; WANG, KANG L.; ITOH, TATSUO; QIAN, YONGXI
To: MASTEK INTERNATIONAL
Reel/Frame 011732/0981 →