IP Library Granted Patent US 6,976,201
Granted Patent B2
US 6,976,201 · App. 10/036,794 · Granted Dec 13, 2005

Method and system for host handling of communications errors

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Quick Facts
Patent No.
US 6,976,201
App. No.
10/036,794
Granted
Dec 13, 2005
Kind
B2
Abstract

A serial communications architecture for communicating between hosts and data store devices. The Storage Link architecture is specially adapted to support communications between multiple hosts and storage devices via a switching network, such as a storage area network. The Storage Link architecture specifies various communications techniques that can be combined to reduce the overall cost and increase the overall performance of communications. The Storage Link architecture can provide packet ordering based on packet type, dynamic segmentation of packets, asymmetric packet ordering, packet nesting, variable-sized packet headers, and use of out-of-band symbols to transmit control information as described below in more detail. The Storage Link architecture can also specify encoding techniques to optimize transitions and to ensure DC-balance.

Claims (49)

1. A method in a network of switches for handling errors, the method comprising:

receiving at a switch a transaction request from an initiator communications device;

transmitting the transaction request through the network to a responding communications device;

receiving at a switch a transaction response from the responding communications device;

transmitting the transaction response through the network to the initiator communications device; and

upon detecting at a switch an error during the transmission of the transaction response, terminating the transmission and transmitting an error message to the initiator communications device from the switch that detected the error rather than notifying the responding communications device that sent the transmission to the switch.

2. The method of claim 1 wherein the initiator communications device is responsible for handling the error.

3. The method of claim 2 wherein the handling includes re-transmitting the transaction request.

4. The method of claim 2 wherein the initiator communications device forwards an indication of the error message to an upper layer for handling.

5. The method of claim 4 wherein the upper layer is an application layer.

6. The method of claim 1 including:

upon detecting an error during the transmission of the transaction request, terminating the transmission and transmitting an error message to the initiator communications device.

7. The method of claim 1 wherein the switches, initiator communications device, and the responding communications device are part of a storage area network.

8. The method of claim 1 wherein the responding communications device is a data store device.

9. The method of claim 1 including wherein a switch, upon receiving the error message, preempts transmission of a data packet to transmit the error message.

10. A method in a switch for handling errors in transmissions between a first communications device and a second communications device, the method comprising:

detecting at the switch an error that occurs during transmission of data transmitted by the second communications device and initiated by the first communications device;

identifying at the switch the first communications device that initiated the transmission of the data; and

transmitting an error message from the switch to the first communications device so that the first communications device can handle the error,

wherein the second communications device that transmitted the data to the switch is not notified of the error.

11. The method of claim 10 wherein the identifying includes retrieving an address for the first communications device that initiated the transmission.

12. The method of claim 10 including receiving an error message addressed to the first communications device and transmitting the error message to the first communications device.

13. The method of claim 10 wherein the switch is part of a storage area network.

14. The method of claim 10 wherein the switch does not have logic for handling error messages.

15. The method of claim 10 wherein the error is detected during transmission of a request transmitted from the first communications device to the second communications device.

16. The method of claim 10 wherein the error is detected during transmission of a response transmitted from the second communications device to the first communications device.

17. The method of claim 10 wherein the first communications device handles the error.

18. The method of claim 10 wherein the first communications device initiates the transmission of data by transmitting a request to the second communications device.

19. The method of claim 18 wherein upon receiving the error message, the first communications device re-initiates the transmission of data by re-transmitting the request to the second communications device.

20. A communications device comprising:

a detection component that detects an error during transmission of data from a transmitting communications device;

an identification component that identifies a communications device that initiated the transmission of the data; and

a transmission component that transmits an error message to the identified communications device rather than reporting the error to the transmitting communications device.

21. The communications device of claim 20 wherein identification component identifies the communications device by retrieving an address for the communications device that initiated the transmission.

22. The communications device of claim 20 wherein the communications device is a switch.

23. The communications device of claim 20 including

a receiving component that receives an error message addressed to an initiator communications device and transmits the error message to initiator communications device without handling the error message.

24. The communications device of claim 20 wherein the communications device is part of a storage area network.

25. The communications device of claim 20 wherein the communications node is a data store device.

26. The communications device of claim 20 wherein the communications device does not have logic for handling errors.

27. The communications device of claim 20 wherein the error is detected during transmission of a request transmitted from the identified communications device to a responding communications device.

28. The communications device of claim 20 wherein the error is detected during transmission of a response transmitted from a responding communications device to the identified communications device.

29. A switch comprising:

means for detecting an error that occurs during transmission of data;

means for identifying a first communications device that initiated the transmission of the data; and

means for transmitting an error message to the first communications device so that the first communications device can handle the error rather than transmitting an error message to a second communications device that transmitted the data to the switch.

30. The switch of claim 29 including wherein the means for identifying includes means for retrieving an address for the first communications device that initiated the transmission.

31 .The switch of claim 29 including:

means for receiving an error message addressed to the first communications device and transmitting the error message to the first communications device.

Assignments (8)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 16, 2021
From: LATTICE SEMICONDUCTOR CORPORATION
To: UNIVERSAL CONNECTIVITY TECHNOLOGIES INC.
Reel/Frame 058979/0440 →
RELEASE OF SECURITY INTEREST Recorded Nov 10, 2021
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
To: LATTICE SEMICONDUCTOR CORPORATION
Reel/Frame 058067/0896 →
SECURITY INTEREST Recorded May 21, 2019
From: LATTICE SEMICONDUCTOR CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
Reel/Frame 049980/0786 →
RELEASE OF SECURITY INTEREST Recorded May 21, 2019
From: JEFFERIES FINANCE LLC
To: LATTICE SEMICONDUCTOR CORPORATION; SILICON IMAGE, INC.; SIBEAM, INC.; DVDO, INC.
Reel/Frame 049827/0326 →
RELEASE OF SECURITY INTEREST Recorded Oct 28, 2015
From: JEFFERIES FINANCE LLC
To: LATTICE SEMICONDUCTOR CORPORATION
Reel/Frame 036905/0327 →
MERGER Recorded Aug 21, 2015
From: SILICON IMAGE, INC.
To: LATTICE SEMICONDUCTOR CORPORATION
Reel/Frame 036419/0792 →
SECURITY INTEREST Recorded Mar 19, 2015
From: LATTICE SEMICONDUCTOR CORPORATION; SIBEAM, INC.; SILICON IMAGE, INC.; DVDO, INC.
To: JEFFERIES FINANCE LLC
Reel/Frame 035226/0147 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 7, 2001
From: SHIN, YESHIK; LEE, DAVID D.; JEONG, DEOG-KYOON; KONG, SHING
To: SILICON IMAGE
Reel/Frame 012441/0281 →