IP Library Granted Patent US 7,039,121
Granted Patent B2
US 7,039,121 · App. 10/045,393 · Granted May 2, 2006

Method and system for transition-controlled selective block inversion communications

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Quick Facts
Patent No.
US 7,039,121
App. No.
10/045,393
Granted
May 2, 2006
Kind
B2
Abstract

A serial communications architecture for communicating between hosts and data store devices. The Storage Link architecture is specially adapted to support communications between multiple hosts and storage devices via a switching network, such as a storage area network. The Storage Link architecture specifies various communications techniques that can be combined to reduce the overall cost and increase the overall performance of communications. The Storage Link architecture may provide packet ordering based on packet type, dynamic segmentation of packets, asymmetric packet ordering, packet nesting, variable-sized packet headers, and use of out-of-band symbols to transmit control information as described below in more detail. The Storage Link architecture may also specify encoding techniques to optimize transitions and to ensure DC-balance.

Claims (52)

1. A method for encoding data comprising: receiving a block of two or more symbols; determining a running disparity of previously transmitted symbols; determining a block disparity of the received block of symbols; and when the block disparity and the running disparity are in the same direction, changing the encoding of the block of symbols so that the running disparity after the block of symbols with the changed encoding is transmitted is better than if the block of symbols without the changed encoding was transmitted; wherein the changing of the encoding includes modifying one of the symbols in the block so that it is an out-of-band symbol and inverting the other symbols in the block and wherein the modifying of the one symbol of the block includes inverting alternate bits of the one symbol.

2. The method of claim 1 wherein the inverting of the other symbols in the block includes inverting all bits of the other symbols.

3. The method of claim 1 including when the running disparity is neutral, not changing the encoding of the block of symbols.

4. The method of claim 1 including when the block disparity and the running disparity are not in the same direction, not changing the encoding of the block of symbols.

5. The method of claim 1 wherein running disparity is the difference between total number of bits with a 1-value and bits with a 0-value in symbols that have been transmitted.

6. The method of claim 1 wherein running disparity is the difference between the number of transmitted blocks with more bits with 1-values than with 0-values and the number of transmitted blocks with more bits with 0-values than with 1-values.

7. The method of claim 1 wherein the symbols in the received block have been encoded using transition optimized encoding.

8. The method of claim 7 wherein transition optimized encoding encodes a code by inverting alternate bits of the code and adding a bit indicating whether alternate bits of the code have been inverted when the number of transitions in the code does not meet a criterion.

9. The method of claim 8 wherein the criterion is that the inverting of the alternate bits will result in more transitions.

10. The method of claim 8 wherein the criterion is that the inverting of the alternate bits will result in less transitions.

11. A method for encoding a block of symbols, the method comprising:

determining a block disparity of the symbols in the block; and

when the block disparity is to be changed,

modifying one of the symbols in the block to indicated that the block disparity is being changed; and

modifying the other symbols in the block to effect the changing of the block disparity of the symbols in the block.

12. The method of claim 11 wherein the modifying of the one symbol includes applying transition inversion to the one symbol.

13. The method of claim 11 wherein the modifying of the one symbol includes inverting alternate bits of the one symbol.

14. The method of claim 11 wherein the modifying of the one symbol includes changing the one symbol so that it is an out-of-band symbol.

15. The method of claim 11 wherein the modifying of the other symbols includes applying polarity inversion to the other symbols.

16. The method of claim 11 wherein the modifying of the other symbols includes inverting each bit of the other symbols.

17. The method of claim 11 including determining that the block disparity is to be changed when the block disparity and a running disparity are not in the same direction.

18. The method of claim 11 including determining that the block disparity is to be changed when a running disparity after the block of symbols are transmitted would be better if the block disparity is changed.

19. The method of claim 11 wherein the modifying of the one symbol includes applying transition inversion to the one symbol and the modifying of the other symbols includes applying polarity inversion to the other symbols.

20. The method of claim 11 wherein a block of symbols contains four symbols.

21. The method of claim 11 wherein a block of symbols contains a configurable number of symbols.

22. An apparatus for encoding a block of symbols, the block of symbols having a block disparity, comprising:

a component that determines whether the block disparity of the symbols in the block is to be changed;

a component that modifies one of the symbols in the block to indicated that the block disparity is being changed when the block disparity is to be changed; and

a component that modifies the other symbols in the block to effect the changing of the block disparity of the symbols in the block when the block disparity is to be changed.

23. The apparatus of claim 22 wherein the modification of the one symbol includes applying transition inversion to the one symbol.

24. The apparatus of claim 22 wherein the modification of the one symbol includes inverting alternate bits of the one symbol.

25. The apparatus of claim 22 wherein the modification of the one symbol includes changing the one symbol so that it is an out-of-band symbol.

26. The apparatus of claim 22 wherein the modification of the other symbols includes applying polarity inversion to the other symbols.

27. The apparatus of claim 22 wherein the modification of the other symbols includes inverting each bit of the other symbols.

28. The apparatus of claim 22 wherein the block disparity is to be changed when the block disparity and a running disparity are not in the same direction.

29. The apparatus of claim 22 including the determination that the block disparity is to be changed when a running disparity after the block of symbols are transmitted would be better if the block disparity is changed.

30. The apparatus of claim 22 wherein the modification of the one symbol includes applying transition inversion to the one symbol and the modifying of the other symbols includes applying polarity inversion to the other symbols.

31. The apparatus of claim 22 wherein a block of symbols contains four symbols.

32. The apparatus of claim 22 wherein a block of symbols contains a configurable number of symbols.

33. An apparatus for encoding a block of symbols, the block of symbols having a block disparity, comprising:

means for modifying one of the symbols in the block to indicate that the block disparity is being changed; and

means for modifying the other symbols in the block to effect the changing of the block disparity of the symbols in the block.

34. The apparatus of claim 33 including means for modifying codes to generate the symbols of the block.

35. The apparatus of claim 34 wherein the means for modifying codes includes transition inverting the codes.

36. The apparatus of claim 33 wherein the means for modifying the one symbol transition inverts the one symbol and wherein the means for modifying the other symbols polarity inverts the other symbols.

37. A method for encoding data comprising: receiving a block of two or more symbols; determining a running disparity of previously transmitted symbols; determining a block disparity of the received block of symbols; and when the block disparity and the running disparity are in the same direction, changing the encoding of the block of symbols so that the running disparity after the block of symbols with the changed encoding is transmitted is better than if the block of symbols without the changed encoding was transmitted wherein the symbols in the received block have been encoded using transition optimized encoding and wherein transition optimized encoding encodes a code by inverting alternate bits of the code and adding a bit indicating whether alternate bits of the code have been inverted when the number of transitions in the code does not meet a criterion.

38. The method of claim 37 wherein the criterion is that the inverting of the alternate bits will result in more transitions.

39. The method of claim 37 wherein the criterion is that the inverting of the alternate bits will result in less transitions.

40. The method of claim 37 including when the running disparity is neutral, not changing the encoding of the block of symbols.

41. The method of claim 37 including when the block disparity and the running disparity are not in the same direction, not changing the encoding of the block of symbols.

42. The method of claim 37 wherein running disparity is the difference between total number of bits with a 1-value anti bits with a 0-value in symbols that have been transmitted.

43. The method of claim 37 wherein running disparity is the difference between the number of transmitted blocks with more bits with 1-values than with 0-values and the number of transmitted blocks with more bits with 0-values than with 1-values.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 16, 2021
From: LATTICE SEMICONDUCTOR CORPORATION
To: UNIVERSAL CONNECTIVITY TECHNOLOGIES INC.
Reel/Frame 058979/0440 →
RELEASE OF SECURITY INTEREST Recorded Nov 10, 2021
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
To: LATTICE SEMICONDUCTOR CORPORATION
Reel/Frame 058067/0896 →
SECURITY INTEREST Recorded May 21, 2019
From: LATTICE SEMICONDUCTOR CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
Reel/Frame 049980/0786 →
RELEASE OF SECURITY INTEREST Recorded May 21, 2019
From: JEFFERIES FINANCE LLC
To: LATTICE SEMICONDUCTOR CORPORATION; SILICON IMAGE, INC.; SIBEAM, INC.; DVDO, INC.
Reel/Frame 049827/0326 →
RELEASE OF SECURITY INTEREST Recorded Oct 28, 2015
From: JEFFERIES FINANCE LLC
To: LATTICE SEMICONDUCTOR CORPORATION
Reel/Frame 036905/0327 →
MERGER Recorded Aug 21, 2015
From: SILICON IMAGE, INC.
To: LATTICE SEMICONDUCTOR CORPORATION
Reel/Frame 036419/0792 →
SECURITY INTEREST Recorded Mar 19, 2015
From: LATTICE SEMICONDUCTOR CORPORATION; SIBEAM, INC.; SILICON IMAGE, INC.; DVDO, INC.
To: JEFFERIES FINANCE LLC
Reel/Frame 035226/0147 →