IP Library Granted Patent US 6,541,324
Granted Patent Utility
US 6,541,324 · Confirmation No. 8837

METHOD OF FORMING A SEMICONDUCTOR ARRAY OF FLOATING GATE MEMORY CELLS HAVING STRAP REGIONS AND A PERIPHERAL LOGIC DEVICE REGION

Inventor: Chih Hsin Wang
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Quick Facts
Patent No.
US 6,541,324
App. No.
10/136,797
Filed
2002-04-30
Granted
2003-04-01
Art Unit
2813
PTA
-51 days