IP Library Granted Patent US 7,038,538
Granted Patent B2
US 7,038,538 · App. 10/376,989 · Granted May 2, 2006

Folded cascode high voltage operational amplifier with class AB source follower output stage

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Quick Facts
Patent No.
US 7,038,538
App. No.
10/376,989
Granted
May 2, 2006
Kind
B2
Abstract

An operational amplifier comprises multiple stages. A differential input stage that includes an adaptive high voltage differential pair generates up and down output currents in response to up and down input voltages. The differential input stage includes adaptive common input high voltage (HV) bias. An intermediate stage converts the up and down output currents into a first output voltage signal. The intermediate stage includes a folded cascode arrangement. The intermediate stage is biased by fixed voltage bias signals. The intermediate stage also includes unaffected slew rate stability compensation and a combined split stability compensation. An output stage includes a class AB source follower driver that generates a second output voltage signal in response to the first output voltage signal. The output stage is biased with an adaptive push-pull source follower output HV bias. The output stage includes feed-forward slew rate enhancement. A local power supply pre-filter provides a filtered local high voltage to the differential input stage and stages that provide the fixed and adaptive voltage bias signals.

Claims (52)

1. An operational amplifier comprising:

a differential input stage including an adaptive high voltage differential pair for providing first and second output currents in response to first and second input voltage signals and a first adaptive bias voltage applied thereto;

an intermediate bias stage providing at least one bias signal;

an intermediate stage for converting the first and second output currents into a first output signal in response to said at least one bias signal; and

an output stage including a class AB source follower driver for generating a second output signal in response to the first output signal and the first adaptive bias voltage, the first adaptive bias voltage being at a voltage level to avoid device breakdown within the operational amplifier.

2. The operational amplifier of claim 1 further comprising an adaptive bias stage coupled to the differential input stage and the output stage for providing the first adaptive bias voltage, wherein the first adaptive bias voltage is an adaptive high voltage bias.

3. The operational amplifier of claim 2 further comprising a plurality of local bias filters, one of said plurality of local bias filters being disposed adjacent each of the differential input stage, intermediate bias stage, adaptive bias stage, and the output stage to filter a corresponding bias voltage applied thereto.

4. The operational amplifier of claim 1 wherein the output stage includes an output driver and an active circuit to provide a feed forward signal to precharge the output driver.

5. The operational amplifier of claim 1 further comprising a plurality of local bias filters, one of said plurality of local bias filters being disposed adjacent each of the differential input stage, intermediate bias stage, and the output stage to filter a corresponding bias voltage applied thereto.

6. An operational amplifier comprising:

a differential input stage including an adaptive high voltage differential pair for providing first and second output currents in response to first and second input voltage signals and a first adaptive bias voltage applied thereto;

an intermediate bias stage providing at least one bias signal;

an intermediate stage for converting the first and second output currents into a first output signal in response to said at least one bias signal;

an output stage including a class AB source follower driver for generating a second output signal in response to the first output signal and the first adaptive bias voltage; and

a filter for providing a local supply voltage to the intermediate bias stage and the intermediate stage in response to a high voltage supply voltage, and wherein the high voltage supply voltage is applied to the output stage.

7. An operational amplifier comprising:

a differential input stage including an adaptive high voltage differential pair for providing first and second output currents in response to first and second input voltage signals and a first adaptive bias voltage applied thereto;

an intermediate bias stage providing at least one bias signal;

an intermediate stage for converting the first and second output currents into a first output signal in response to said at least one bias signal;

an output stage including a class AB source follower driver for generating a second output signal in response to the first output signal and the first adaptive bias voltage; and

a bias stage coupled to the differential input stage, the intermediate bias stage, and the output stage to provide a corresponding bias voltage thereto, the first adaptive bias voltage being at a voltage level to avoid device breakdown within the operational amplifier.

8. The operational amplifier of claim 7 wherein the bias voltage has a first level for a normal operation mode and a second level for a standby mode.

9. The operational amplifier of claim 7 further comprising a plurality of local bias filters, one of said plurality of local bias filters being disposed adjacent each of the differential input stage, intermediate bias stage, and the output stage to filter the corresponding bias voltage applied thereto.

10. An adaptive differential pair circuit comprising:

a differential pair including first and second input voltage terminals and generating first and second output currents in response to voltages applied to said first and second input voltage terminals;

a bias circuit coupled to the differential pair for providing a bias current;

a first buffer circuit coupled to the bias circuit to limit low end levels of high voltage supply voltages applied to the differential pair and the bias circuit; and

a second buffer circuit coupled to the differential pair to lower said high voltage supply voltages applied to the differential pair in response to an adaptive high voltage bias applied thereto.

11. The adaptive differential pair circuit of claim 10 wherein the bias circuit provides the bias current in response to an adaptive voltage applied thereto.

12. An adaptive high voltage source follower output amplifier comprising:

a class AB push-pull source follower amplifier circuit for providing an output voltage in response to an input voltage; and

a buffer circuit coupled to the class AB push-pull source follower amplifier circuit for limiting a level of a high voltage power signal applied to the class AB push-pull source follower amplifier circuit to causes voltages levels within the class AB push-pull source follower amplifier circuit to be at levels to avoid device breakdown within the class AB push-pull source follower amplifier circuit in response to an adaptive bias voltage.

13. The adaptive high voltage source follower output amplifier of claim 12 further comprising a feed forward slew rate enhancement circuit coupled to the buffer circuit and the class AB push-pull source follower amplifier circuit to provide a precharge to the class AB push-pull source follower amplifier circuit in response to another input voltage.

14. An intermediate folded current load stage comprising:

a folded cascode including up and down current input terminals and first and second bias voltage terminals;

an adaptive high voltage circuit coupled to the folded cascode to provide an adaptive bias voltage in response to a high voltage signal;

an output circuit providing an output voltage to an output terminal in response to up and down current inputs and first and second bias voltages; and

a current source coupled to the output circuit for providing a current for said output circuit, the adaptive bias voltage being at a voltage level to avoid device breakdown within the output circuit.

15. The intermediate folded current load stage of claim 14 further comprising:

first and second fixed bias voltage generators coupled to the folded cascode for providing the first and second bias voltages, at least one of the first and second voltage generators comprising:

a current source;

a buffer circuit to limit the voltage level of the fixed bias voltage; and

a bias voltage source for limiting an applied bias voltage to generate the bias voltage.

16. The intermediate folded current load stage of claim 14 further comprising a recovery circuit coupled in parallel to the folded cascode to clamp current on said up and down input terminals in response to transients.

17. The intermediate folded current load stage of claim 14 wherein the bias voltage is fixed.

18. The intermediate folded current load stage of claim 14 wherein the bias voltage is adaptive.

19. The intermediate folded current load stage of claim 14 further comprising a split stability compensation circuit coupled between the output terminal and the current source to control said current in response to the output voltage.

20. An operational amplifier comprising:

a differential input stage including an adaptive high voltage differential pair for providing first and second output currents in response to first and second input voltage signals, a first adaptive bias voltage, and a first bias current applied thereto, the first bias current having a first level for a normal operating mode and a second level for a standby mode, said second level being less than said first level;

an intermediate bias stage providing at least one bias signal in response to a second bias current the second bias current having a first level for said normal operating mode and a second level for said standby mode, said second level being less than said first level;

an intermediate stage for converting the first and second output currents into a first output signal in response to said at least one bias signal; and

an output stage including a class AB source follower driver for generating a second output signal in response to the first output signal, the first adaptive bias voltage, and a third bias current, the third bias current having a first level for said normal operating mode and a second level for said standby mode, said second level being less than said first level, the mode does not power down the differential stage, the intermediate bias stage, and the output stage and maintains voltage levels within the differential stage, the intermediate bias stage, and the output stage at a level below breakdown voltage levels.

Assignments (14)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: SILICON STORAGE TECHNOLOGY, INC.
Reel/Frame 059687/0344 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: SILICON STORAGE TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041675/0316 →