Method for fabricating a through hole on a semiconductor substrate
View Patent ↗A method for fabricating a through hole is disclosed. First, a conductive structure having a conductive layer and a cap layer are formed on a substrate. A patterned first photoresist layer is formed on the substrate and the conductive structure to define a pattern of the through hole. Then, a first etching process to remove the cap layer not covered by the first photoresist layer is performed until the conductive layer is exposed. The first photoresist layer is removed. A dielectric layer and a patterned second photoresist layer are formed on the substrate. Finally, a second etching process is performed to remove the dielectric layer not covered by the second photoresist layer until the conductive layer is exposed. The pattern of the second photoresist layer is the same as the pattern of the first photoresist layer.
1. A method for fabricating a through hole comprising:
forming a conductive structure on a substrate, wherein the conductive structure comprises at least a conductive layer and a cap layer positioned on the conductive layer;
forming a patterned first photoresist layer on the substrate and the conductive structure to define at least a pattern of a through hole;
performing a first etching process to remove the cap layer not covered by the first photoresist layer until at least a first portion of the conductive layer is exposed;
removing the first photoresist layer;
forming a dielectric layer and a patterned second photoresist layer on the substrate in sequence, wherein a pattern of the second photoresist layer is the same as a pattern of the first photoresist layer; and
performing a second etching process to remove the dielectric layer not covered by the second photoresist layer until the first portion of the conductive layer is exposed.
2. The method of claim 1 , wherein the conductive layer is a metal layer, and the cap layer is an anti-reflection coating (ARC) layer.
3. The method of claim 1 , wherein the step of forming the conductive structure on the surface of the substrate comprises:
forming the conductive layer on the substrate;
forming the cap layer on the conductive layer;
forming a patterned third photoresist layer on the cap layer to define the conductive structure;
performing a third etching process by taking the third photoresist layer as an etching mask to remove the cap layer and the conductive layer not covered by the third photoresist layer; and
removing the third photoresist layer.
4. The method of claim 3 , wherein the first etching process and the third etching process are performed in the same reaction chamber.
5. The method of claim 3 , wherein the first etching process and the third etching process utilize the same etching agent.
6. The method of claim 2 , wherein the metal layer comprises an aluminum alloy layer.
7. The method of claim 2 , wherein the ARC layer comprises a titanium nitride or/and titanium (TiN/Ti) layer.
8. The method of claim 7 , wherein the etching agent of the first etching process is selected from the group consisting of BCl 3 /Cl 2 , CCl 4 , and SF 6 .
9. The method of claim 1 , wherein the conductive layer comprises a doped polysilicon layer, and the cap layer comprises a silicon nitride layer.
10. The method of claim 1 , wherein the dielectric layer comprises an oxide layer.
11. The method of claim 10 , wherein an etching agent of the second etching process is selected from the group consisting of CHF 3 , CF 4 , and Ar.