IP Library Assignment 049562/0154
Patent Assignment
Reel/Frame 049562/0154

Change of Name

Recorded: 2019-06-24 Pages: 3
Assignor
POWERCHIP SEMICONDUCTOR CORP.
Executed: 2010-08-09
Assignee
POWERCHIP TECHNOLOGY CORPORATION
NO. 12, LI-HSIN ROAD I, HSINCHU SCIENCE PARK,, HSINCHU, TAIWAN
Covered Properties (20)
Method and Related System for Semiconductor Equipment Prevention Maintenance Management
Patent: 6,950,783 →
Application: 10/708,572 →
Publication: US 2005/0203858
Method and Related System for Semiconductor Equipment Early Warning Management
Patent: 6,999,897 →
Application: 10/708,573 →
Publication: US 2005/0203715
Method of Fabricating Non-Volatile Memory Cell Adapted for Integration of Devices and for Multiple Read/Write Operations
Patent: 7,049,189 →
Application: 10/708,904 →
Publication: US 2005/0176203
Aseismatic Device
Patent: 7,028,433 →
Application: 10/708,944 →
Publication: US 2005/0126423
[Split Gate Flash Memory Cell and Manufacutirng Method Thereof]
Patent: 6,821,849 →
Application: 10/709,309 →
Publication: US 2004/0197999
[Flash Memory with Self-Aligned Split Gate and Methods for Fabricating and for Operating the Same]
Patent: 6,838,343 →
Application: 10/709,310 →
Publication: US 2004/0196720
Tool for Removing Particles from Reticle
Patent: 7,234,196 →
Application: 10/709,335 →
Publication: US 2005/0168739
[Non-Volatile Memory Cell and Manufacturing Method Thereof]
Patent: 7,038,267 →
Application: 10/709,372 →
Publication: US 2005/0145921
[Method of Fabricating Flash Memory Cell]
Patent: 6,972,260 →
Application: 10/709,469 →
Publication: US 2005/0250335
[Flash Memory Structure and Operating Method Thereof]
Patent: 6,914,826 →
Application: 10/709,507 →
Publication: US 2004/0217412
Method of Forming Barrier Layer
Patent: 7,115,214 →
Application: 10/709,552 →
Publication: US 2005/0103750
[Flash Memory Device Structure and Manufacturing Method Thereof]
Patent: 6,913,974 →
Application: 10/709,590 →
Publication: US 2004/0197994
[Pipe Trap]
Patent: 7,344,579 →
Application: 10/709,607 →
Publication: US 2005/0144915
[Method of Fabricating a Flash Memory]
Patent: 6,893,918 →
Application: 10/709,639 →
[Method of Fabricating a Flash Memory]
Patent: 6,984,559 →
Application: 10/709,640 →
Publication: US 2005/0176200
Method for Fabricating a Through Hole on a Semiconductor Substrate
Patent: 6,995,086 →
Application: 10/710,237 →
Publication: US 2005/0148168
Device and Method for Testing an Exposure Apparatus
Patent: 7,145,644 →
Application: 10/710,243 →
Publication: US 2005/0190348
Method of Fluoride-Containing Wastewater Treatment
Patent: 7,182,873 →
Application: 10/710,402 →
Publication: US 2006/0006115
[Dummy Process and Polishing-Pad Conditioning Process for Chemical Mechanical Polishing Apparatus]
Patent: 6,913,516 →
Application: 10/710,508 →
[Auto-Recovery Wafer Testing Apparatus and Wafer Testing Method]
Patent: 6,963,213 →
Application: 10/710,670 →
Publication: US 2005/0231190
Related Assignments (4)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Jul 14, 2019
From: POWERCHIP TECHNOLOGY CORPORATION
To: POWERCHIP SEMICONDUCTOR MANUFACTURING CORPORATION
Reel/Frame 049746/0970 →
Assignment of Assignor's Interest Jul 14, 2019
From: POWERCHIP TECHNOLOGY CORPORATION
To: POWERCHIP SEMICONDUCTOR MANUFACTURING CORPORATION
Reel/Frame 049746/0981 →
Assignment of Assignor's Interest Apr 8, 2020
From: POWERCHIP SEMICONDUCTOR MANUFACTURING CORPORATION
To: POWERCHIP TECHNOLOGY CORPORATION
Reel/Frame 052337/0735 →
Assignment of Assignor's Interest Sep 7, 2020
From: POWERCHIP TECHNOLOGY CORPORATION
To: NEXCHIP SEMICONDUCTOR CORPORATION
Reel/Frame 053704/0522 →