IP Library Granted Patent US 7,619,428
Granted Patent B2
US 7,619,428 · App. 10/718,825 · Granted Nov 17, 2009

Wafer level burn-in and electrical test system and method

Assignee: Aehr Test Systems
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Quick Facts
Patent No.
US 7,619,428
App. No.
10/718,825
Granted
Nov 17, 2009
Kind
B2
Abstract

A burn-in and electrical test system ( 20 ) includes a temperature controlled zone ( 22 ) and a cool zone ( 24 ) separated by a transition zone 25 . The temperature controlled zone ( 22 ) is configured to receive a plurality of wafer cartridges ( 26 ) and connect the cartridges ( 26 ) to test electronics ( 28 ) and power electronics ( 30 ), which are mounted in the cool zone ( 24 ). Each of the wafer cartridges ( 26 ) contains a semiconductor wafer incorporating a plurality of integrated circuits. The test electronics ( 28 ) consists of a pattern generator PCB ( 100 ) and a signal driver and fault analysis PCB ( 102 ) connected together by a parallel bus ( 104 ). The pattern generator PCB ( 100 ) and the fault analysis PCB ( 102 ) are connected to a rigid signal probe PCB ( 104 ) in cartridge ( 26 ) to provide a straight through signal path. The probe PCB ( 104 ) is rigid in order to allow close control of capacitance between each signal line and a backplane, thus providing impedance controlled interconnections between a semiconductor wafer under test and the test electronics ( 28 ). The power distribution system ( 30 ) is connected to a probe power PCB ( 106 ) in the cartridge ( 26 ). The probe power PCB ( 106 ) has at least a bendable portion in order to allow it to be positioned closely adjacent to and parallel with the rigid probe PCB ( 104 ), yet extend a substantial distance away from the probe PCB ( 106 ) at its interconnection ( 109 ).

Claims (9)

1. A system comprising:

(a) a temperature controlled zone configured to receive a plurality of individually removable wafer cartridges each containing a semiconductor wafer, each of the plurality of individually removable wafer cartridges including a probe power printed circuit board;

(b) power electronics positioned in a cool zone adjacent to said temperature controlled zone;

(c) a first interconnection system connecting power electronics to said probe power printed circuit board, the first interconnection system including a plurality of connections to separately receive the individually removable wafer cartridges;

(d) power lines coupled to the wafer; and

(e) circuitry external to the wafers that measures the power lines, the measuring comprising receiving voltage measurements or current measurements;

the plurality of cartridges including a probe signal printed circuit board;

wherein the system additionally comprises electronics positioned in said cool zone adjacent to said temperature controlled zone; and a second interconnection system connecting said electronics to said probe signal printed circuit board;

in which the electronics comprise a main signal printed circuit board and an extender circuit board connected to said main signal printed circuit board, first and second printed circuit board connectors respectively mounted on said main signal and extender printed circuit boards, each of said main signal and extender printed circuit boards having a plurality of contact members, said main signal printed circuit board connector having a first plurality of interconnection lines connected to said main signal printed circuit board connector and a second plurality of interconnection lines connected to said plurality of contact members of said main signal printed circuit board, said extender printed circuit board having a third plurality of interconnection lines connected to said extender printed circuit board connector and a fourth plurality of interconnection lines connected to said plurality of contact members of said extender printed circuit board, said first printed circuit board connector engaging said plurality of contact members of said extender printed circuit board and said second printed circuit board connector engaging said plurality of contact members of said main signal printed circuit board.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 5, 2019
From: QVT FUND LP; QUINTESSENCE FUND L.P.
To: AEHR TEST SYSTEMS
Reel/Frame 050928/0695 →
SECURITY INTEREST Recorded Apr 14, 2015
From: AEHR TEST SYSTEMS
To: QVT FUND LP; QUINTESSENCE FUND L.P.
Reel/Frame 035424/0783 →
RELEASE OF SECURITY INTEREST Recorded Apr 13, 2015
From: SILICON VALLEY BANK
To: AEHR TEST SYSTEMS
Reel/Frame 035420/0390 →
SECURITY AGREEMENT Recorded Sep 6, 2013
From: AEHR TEST SYSTEMS
To: SILICON VALLEY BANK
Reel/Frame 031171/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 21, 2003
From: RICHMOND, II, DONALD PAUL; HOANG, JOHN DINH; LOBACZ, JERZY
To: AEHR TEST SYSTEMS
Reel/Frame 014740/0177 →
Continuity (3)
Continuation 0986595700 · May 25, 2001
Division 0935312100 · Jul 14, 1999
Related Publication 20040113645A1 · Jun 17, 2004