Memory egress self selection architecture
View Patent ↗A method of time division multiplex switching reduces the implementation area by reducing the area required for both memory storage at each egress port and the multiplexing circuitry required. Ingress and egress processors are implemented to control the storage and selection of data grains to allow for the reduction in the memory and multiplexer areas.
1. A time division multiplexing switch comprising:
a plurality of ingress ports, each of the ingress ports in the plurality for synchronously receiving data grains at fixed time intervals, the data grains ordered as grain groups;
a plurality of memory egress self selection (MESS) egress ports, for receiving the data grains from the plurality of ingress ports, and transmitting the data grains in a predetermined order; and
a grain aggregator, operatively connected to the plurality of ingress ports, for aggregating the data grains received by each of the ingress ports during a single timeslot into an aggregate of data grains in an N grain wide channel, where N is the number of ingress ports, and for providing the aggregate of data grains to the plurality of MESS egress ports simultaneously;
each MESS egress port from the plurality having a data grain selector for selecting from the aggregate of data grains only data grains that the MESS egress port will transmit, prior to storing the selected grains for transmission by the MESS egress port;
said data grain selector being able to select up to N data grains during a single timeslot in accordance with at least one predetermined criterion being based on the ingress port associated with the received data grains and a position of a grain in its respective grain group.
2. The time division multiplexing switch of claim 1 , wherein the data grain selector includes an ingress processor for receiving the aggregate of the data grains, and for selecting data grains from the aggregate for storage in accordance with the at least one predetermined criterion.
3. The time division multiplexing switch of claim 2 , wherein the ingress processor includes an interest memory for storing a grain mask corresponding to the predetermined grain selection criterion and a finite state machine for selecting grains from the aggregate for storage in accordance with the grain mask by compacting incoming data grains into data memory at each egress port to remove gaps between the selected grains.
4. The time division multiplexing switch of claim 2 , wherein each of the MESS egress ports includes:
a memory for storing the selected data grains, the memory including a plurality of random access memories (RAMs) for storing a received grain; and
an egress processor for reading and transmitting the stored data grains from the memory in a predetermined order.
5. The time division multiplexing switch of claim 4 , wherein the ingress processor includes a memory compactor for addressing the selected data grains for storage in the memory without memory fragmentation.
6. The time division multiplexing switch of claim 5 wherein the memory compactor includes a finite state machine for selecting the first available location in memory and a plurality of multiplexers for multiplexing the selected data grains into the memory.
7. The time division multiplexing switch of claim 4 , wherein the memory is sized to store exactly one grain group.
8. The time division multiplexing switch of claim 4 , wherein the memory stores only the selected data grains.
9. The time division multiplexing switch of claim 4 , wherein the egress processor includes an egress processing memory for storing the predetermined order for reading and transmitting the stored data grains.
10. The time division multiplexing switch of claim 4 , wherein the egress processor includes an N:1 multiplexer attached to the memory for reading and sequentially transmitting the stored data grains in the predetermined order, where N is the number of ingress ports.
11. The time division multiplexing switch of claim 4 , wherein the egress processor includes an N:M multiplexer attached to the memory for reading and sequentially transmitting a plurality of data grains in the predetermined order, where N is the number of ingress ports and M≧1.
12. A time division multiplexing switch comprising:
a plurality of ingress ports, each of the ingress ports in the plurality for synchronously receiving data grains at fixed time intervals, the data grains ordered as grain groups;
a plurality of memory egress self selection (MESS) egress ports, for receiving the data grains from the plurality of ingress ports and for transmitting stored data grains in a predetermined order, and
a grain aggregator, operatively connected to the plurality of ingress ports, for aggregating the data grains received by each of the ingress ports during a single timeslot into an aggregate of data grains in an N grain wide data channel, where N is the number of ingress ports, and for providing the aggregate of data grains to the plurality of MESS egress ports simultaneously;
each MESS egress port from the plurality having a data grain selector for selecting from the aggregate of data grains only data grains that the MESS egress port will transmit;
said data grain selector being able to select up to N data grains during a single timeslot in accordance with at least one predetermined criterion prior to storing the selected grains for transmission by the MESS egress port,
wherein the data grain selector includes an ingress processor for receiving the aggregate of the data grains received by the plurality of ingress ports during a single timeslot, and for selecting data grains from the aggregate for storage in accordance with the at least one predetermined criterion,
wherein the ingress processor includes an interest memory for storing a grain mask corresponding to the predetermined grain selection criterion and a finite state machine for selecting grains from the aggregate for storage in accordance with the grain mask, and
wherein the grain mask is based on the associated ingress port and the position of the grain in the respective grain group.
13. A time division multiplexing switch comprising:
a plurality of ingress ports, each of the ingress ports in the plurality for synchronously receiving data grains at fixed time intervals, the data grains ordered as grain groups;
a plurality of memory egress self selection (MESS) egress ports, for receiving the data grains from the plurality of ingress ports and for transmitting stored data grains in a predetermined order; and
a grain aggregator, operatively connected to the plurality of ingress ports, for aggregating the data grains received by each of the ingress ports during a single timeslot into an aggregate of data grains in an N grain wide channel where N is the number of ingress ports, and for providing the aggregate of data grains to the plurality of MESS egress ports simultaneously;
each MESS egress port from the plurality having a data grain selector for selecting from the aggregate of data grains only data grains that the MESS egress port will transmit, said selection is performed in accordance with at least one predetermined criterion prior to storing the selected grains for transmission by the MESS egress port, said data grain selector being able to select up to N data grains during a single timeslot;
wherein the data grain selector includes an ingress processor for receiving an aggregate of the data grains received by the plurality of ingress ports, and for selecting data grains from the aggregate for storage in accordance with the at least one predetermined criterion,
wherein each of the MESS egress ports includes:
a memory for storing the selected data grains, and
an egress processor for reading and transmitting the stored data grains from the memory in a predetermined order, the egress processor including an egress processing memory for storing the predetermined order for reading and transmitting the stored data grains; and
the switch further including a connection memory for storing connection information, for providing an interest RAM with the predetermined criterion and the egress processing memory with the predetermined order in accordance with the stored connection information.
14. A method of time division multiplex switching received data grains to a plurality of egress ports, the method comprising:
receiving and aggregating a plurality of data grains received in a single timeslot at a number N of ingress ports in an N grain wide channel, each of the plurality of data grains being associated with a grain group;
transferring the aggregate of the received data grains to the plurality of egress ports simultaneously;
at a selected egress port in the plurality of egress ports, selecting from the aggregate only data grains that the selected egress port will transmit, the selected data grains numbering up to N data grains in a single timeslot, including applying a mask to the aggregate to select grains in accordance with the ingress port associated with the position of the grain in the aggregate and the position of the grain in its respective grain group;
storing the selected data grains at the selected egress port; and
transmitting the stored data grains from the selected egress port in a predetermined order.
15. The method of claim 14 wherein the step of storing the selected grains includes compactly storing the selected grains in a memory.
16. The method of claim 15 wherein the step of transmitting includes reading stored grains from the memory in a predetermined order.
17. The method of claim 14 wherein the steps of selecting, storing and transmitting are performed at each of the plurality of egress ports.