Method and apparatus for reducing current demand variations in large fan-out trees
View Patent ↗A method and apparatus are provided for reducing current demand variations in large fanout trees. The fanout tree is split into at least 2 sub-groups, each preferably with substantially equal parasitic capacitance. Data is then scrambled according to a scrambling sequence function to provide scrambled data having a constant number of bits that are toggled with respect to time, such as when observed in pairs of sub-groups. Functionally, an apparatus according to an embodiment of the present invention includes 3 blocks: a scrambler, egress logic, and a de-scrambler. The egress logic is simply a block of storage that can reorder the bytes received from the scrambler. The de-scrambler de-scrambles the retransmitted data based on the scrambling sequence function. Embodiments of the present invention can be applied to any system where data must fanout from a single source to many destinations, such as switches.
1. A data transmission apparatus having ingress and egress ports, and comprising:
a scrambler to split a fanout of ingress data, from each ingress port to the egress ports, into a first sub-group and a second sub-group and to scramble the first and second sub-groups according to a scrambling sequence function to provide a combined scrambled output of the first and second sub-groups having a constant number of toggled bits with respect to time, wherein the first and second sub-groups carry same data prior to being scrambled.
2. The data transmission apparatus of claim 1 wherein the first and second sub-groups have substantially equal parasitic capacitance.
3. The data transmission apparatus of claim 1 wherein the scrambling sequence function includes first and second scrambling patterns to scramble the first and second sub-groups, respectively.
4. The data transmission apparatus of claim 3 wherein the ingress data is time division multiplexed (TDM) data, and the first and second scrambling patterns each have a bit width equal to a grain bit width of the ingress data.
5. The data transmission apparatus of claim 3 wherein the first and second scrambling patterns each have a length of 2 scrambling elements.
6. The data transmission apparatus of claim 1 wherein the constant number of toggled bits is equal to half the number of sub-groups.
7. The data transmission apparatus of claim 1 wherein the scrambler further comprises ingress port logic to split the ingress data into a plurality of groups, a first group including the first and second sub-groups, and a second group including third and fourth sub-groups, the scrambler to scramble the third and fourth sub-groups according to a second scrambling sequence function to provide a combined scrambled output of the third and fourth sub-groups having a second constant number of toggled bits with respect to time.
8. The data transmission apparatus of claim 7 wherein the third and fourth sub-groups have substantially equal parasitic capacitance.
9. The data transmission apparatus of claim 1 wherein the scrambler scrambles the first and second sub-groups according to the scrambling sequence function so that the constant number of toggled bits is independent of the ingress data.
10. The data transmission apparatus of claim 1 wherein the scrambler scrambles the first and second sub-groups according to the scrambling sequence function to provide a first sub-group scrambled output and a second sub-group scrambled output.
11. The data transmission apparatus of claim 10 wherein the scrambler further comprises a counter to count timeslots in the ingress data, and a plurality of XOR gates to scramble the ingress data in response to an output of the counter, to provide the first and second sub-group scrambled outputs.
12. The data transmission apparatus of claim 10 wherein the scrambler further comprises first and second sub-group interleavers to provide the first and second sub-group scrambled outputs, respectively.
13. The data transmission apparatus of claim 1 further comprising: egress logic to receive and retransmit scrambled data received from the scrambler.
14. The data transmission apparatus of claim 13 wherein the egress logic comprises first and second sub-group egress selection switches to receive and retransmit first and second sub-group scrambled outputs, respectively, from the scrambler.
15. The data transmission apparatus of claim 13 wherein the egress logic retransmits scrambled data such that it reorders the scrambled data.
16. The data transmission apparatus of claim 13 wherein the egress logic retransmits scrambled data such that it changes the timing of the scrambled data and transfers an identifier of the scrambling sequence function.
17. The data transmission apparatus of claim 1 further comprising: a de-scrambler to receive scrambled data, and to de-scramble the scrambled data based on the scrambling sequence function.
18. The data transmission apparatus of claim 17 wherein the de-scrambler comprises a first sub-group descrambler and a second sub-group descrambler, to de-scramble the first sub-group and second sub-group, respectively.
19. The data transmission apparatus of claim 17 wherein the de-scrambler de-scrambles the scrambled data based on a scrambling sequence function identifier.
20. The data transmission apparatus of claim 19 wherein scrambling sequence function identifier is an ingress timeslot number, an egress group number, or a sub-group identifier.
21. The data transmission apparatus of claim 17 wherein the de-scrambler selectively de-scrambles the first-sub group and the second sub-group of an egress port group in response to a configuration signal.
22. The data transmission apparatus of claim 17 wherein the de-scrambler comprises a first AND gate coupled to first XOR gates to de-scramble the first sub-group, and a second AND gate coupled to second XOR gates to de-scramble the second sub-group.
23. The data transmission apparatus of claim 17 wherein the de-scrambler comprises a counter to determine the scrambling sequence function.
24. The data transmission apparatus of claim 1 wherein the data transmission apparatus is a memory switch.
25. A computer-implemented method of transmitting data in a data transmission apparatus having ingress and egress ports, comprising:
splitting a fanout of ingress data, from each ingress port to the egress ports, into a first sub-group and a second sub-group; and
scrambling the first and second sub-groups according to a scrambling sequence function into first and second scrambled data, respectively, the first and second scrambled data, when considered together, having a constant number of bits that are toggled with respect to time, wherein the first and second sub-groups carry same data prior to being scrambled.
26. The computer-implemented method of claim 25 wherein the first and second sub-groups have substantially equal parasitic capacitance.
27. The computer-implemented method of claim 25 wherein the step of scrambling the first and second sub-groups according to the scrambling sequence function includes scrambling the first and second sub-groups according to first and second scrambling patterns, respectively.
28. The computer-implemented method of claim 27 wherein the first and second scrambling patterns each have a bit width equal to a grain bit width of the ingress data, when the ingress data is time division multiplexed (TDM) data.
29. The computer-implemented method of claim 27 wherein the first and second scrambling patterns each have a length of 2 scrambling elements.
30. The computer-implemented method of claim 25 wherein the constant number of toggled bits is equal to half the number of sub-groups.
31. The computer-implemented method of claim 25 wherein the step of splitting the fanout of ingress data includes splitting the ingress data into a plurality of groups, a first group including the first and second sub-groups, and a second group including third and fourth sub-groups, and further comprising the step of scrambling the third and fourth sub-groups according to a second scrambling sequence function to provide a combined scrambled output of the third and fourth sub-groups having a second constant number of toggled bits with respect to time.
32. The computer-implemented The method of claim 31 wherein the third and fourth sub-groups having substantially equal parasitic capacitance.
33. The computer-implemented method of claim 25 wherein the constant number of bits that are toggled with respect to time is independent of the ingress data.
34. The computer-implemented method of claim 25 wherein the step of scrambling the first and second sub-groups according to the scrambling sequence function provides a first sub-group scrambled output and a second sub-group scrambled output.
35. The computer-implemented method of claim 25 further comprising the step of de-scrambling the retransmitted data based on the scrambling sequence function.
36. A scrambler circuit for use with a data transmission apparatus having ingress and egress ports, the scrambler comprising:
ingress logic to split a fanout of ingress data, from each ingress port to the egress ports, into a first sub-group and a second sub-group; and
scrambling logic to scramble the first and second sub-groups according to a scrambling sequence function to provide a combined scrambled output of the first and second sub-groups having a constant number of bits that are toggled with respect to time, wherein the first and second sub-groups carry same data prior to being scrambled.