Semiconductor devices having diffusion barrier regions and halo implant regions and methods of fabricating the same
View Patent ↗The present disclosure provides an example of a semiconductor device. In addition, a method for fabricating a semiconductor device is outlined. The semiconductor device may be fabricated by providing a semiconductor substrate, forming a gate over the substrate, forming diffusion barrier ion regions, forming halo regions, forming a source, and forming a drain.
1. A method for fabricating a semiconductor device comprising:
providing a semiconductor substrate;
forming a gate over the substrate such that a channel is formed in the substrate having a source side and a drain side, wherein at least a portion of the channel is defined by the gate;
forming diffusion barrier ion regions by injecting diffusion barrier ions into the source side and the drain side of the channel, wherein the diffusion barrier ion regions are in contact with the channel;
forming halo regions by injecting halo impurity ions of a first conductivity into the portions corresponding to the diffusion barrier ion regions after forming diffusion barrier ion regions;
forming a source by injecting impurity ions of a second conductivity into the substrate adjacent to the source side of the channel; and
forming a drain by injecting impurity ions of the second conductivity into the substrate adjacent to the drain side of the channel.
2. A method as defined by claim 1 , wherein at least one of the diffusion barrier ions occupies an interstitial site in a crystal lattice of the substrate.
3. A method as defined by claim 1 , wherein at least one of the diffusion barrier ions is smaller than an atom of the substrate and has size corresponding to the halo impurity ion.
4. A method as defined by claim 1 , wherein at least one of the diffusion barrier ions comprises carbon.
5. A method as defined by claim 1 , wherein at least one of the halo impurity ions comprises baron.
6. A method as defined by claim 1 , wherein forming the diffusion barrier ion regions comprises performing a tilted ion implantation with a tilt angle of 5° to 30° from an axis orthogonal to the surface of the substrate.
7. A method as defined by claim 1 , wherein forming the halo impurity ion regions comprises performing a tilted ion implantation with a tilt angle of 5° to 30° from an axis orthogonal to the surface of the substrate.
8. A method as defined by claim 1 , wherein the diffusion barrier ions are injected with an energy of 10to 50 keV and a concentration of 10 13 to 10 15 ions/cm 2 .
9. A method as defined by claim 1 , wherein the halo impurity ions are injected with an energy of 10 to 50 keV and a concentration of 5×10 13 to 5×10 14 ions/cm 2 .
10. A method as defined by claim 1 , wherein as the impurity ions of the second conductivity comprise arsenic, injected with an energy of 10 to 30 keV and a concentration of 1×10 14 to 1×10 15 ions/cm 2 to form the source and drain.
11. A method as defined by claim 1 , wherein as the impurity ions of the second conductivity comprise phosphorus, injected with an energy of 5 to 25 keV and a concentration of 1×10–to 1×10 15 ions/cm 2 to from the source and drain.
12. A method as defined by claim 1 further comprising:
annealing the substrate at a temperature of about 900° C. to 1050° C. for a time period of about 10 to about 20 seconds.
13. A method as defined by claim 1 , wherein the first conductivity is p-type and the second conductivity is n-type.
14. The method as defined by claim 1 , wherein the halo impurity ions are injected into only the portions of the substrate corresponding to the diffusion barrier ion regions.
15. A method for fabricating a semiconductor device comprising:
forming a gate over a semiconductor substrate to form a channel in the substrate having a source side and a drain side;
injecting diffusion barrier ions into the source side and the drain side of the channel, in contact with the channel to form diffusion barrier ion regions;
after forming diffusion barrier ion regions, injecting halo impurity ions of a first conductivity only into regions containing the diffusion barrier ions;
forming a source and drain by injecting impurity ions of a second conductivity into the substrate adjacent to the source and drain sides of the channel.
16. The method as defined by claim 15 , wherein the diffusion barrier ion is smaller than an atom of the substrate and has a size corresponding to the halo impurity ion.
17. The method as defined by claim 16 , wherein the substrate comprises silicon, the diffusion barrier ions comprise carbon, and the halo impurity ions comprise boron.
18. The method as defined by claim 16 , wherein each of the diffusion barrier ion region and halo impurity ion region forming steps comprises injecting the ions with an energy of 10 to 50 keV.
19. The method as defined by claim 15 , wherein each of the diffusion barrier ion region and halo impurity ion region forming steps comprises performing a tilted ion implantation with a tilt angle 5° to 30° from an axis orthogonal to the surface of the substrate.
20. The method as defined by claim 15 , wherein the impurity ions comprise arsenic or phosphorus, with a concentration of 1×10 14 to 1×10 15 ions/cm 2 .