A method of forming a memory device (and the resulting device) by forming an electron trapping dielectric material over a substrate, forming conductive material over the dielectric material, forming a spacer of material over the conductive material, removing portions of the dielectric material and the conductive material to form segments thereof disposed underneath the spacer of material, forming first and second spaced-apart regions in the substrate having a second conductivity type different from that of the substrate, with a channel region extending between the first and second regions, with the segments of the dielectric and first conductive materials being disposed over a first portion of the channel region for controlling a conductivity thereof, and forming a second conductive material over and insulated from a second portion of the channel region for controlling a conductivity thereof.
1. A memory device comprising:
pairs of memory cells formed on a substrate of a first conductivity type, each of the memory cell pairs including:
a pair of electron trapping dielectric material segments disposed over the substrate,
a pair of first conductive material segments disposed over the dielectric material segments,
a pair of spacers of material disposed over the first conductive material segments, and
a first region formed in the substrate under the memory cell pair and having a second conductivity type different from the first conductivity type;
a plurality of channel regions defined in the substrate each extending between adjacent pairs of the first regions, wherein each of the channel regions have first and second portions, and
wherein each of the segments of the dielectric and first conductive materials are disposed over one of the channel region first portions for controlling a conductivity thereof;
a layer of second conductive material that extends over the pairs of memory cells and that includes portions each of which extend over and are insulated from one of the channel region second portions for controlling a conductivity thereof.
2. The device of claim 1 , further comprising:
insulating material between the dielectric material segments and the substrate.
3. The device of claim 1 , wherein each of the pairs of memory cells further includes:
a trench disposed between the pair of the electron trapping dielectric material segments and between the pair of the first conductive material segments; and
a block of conductive material disposed in the trench and in electrical contact with the first region.
4. The device of claim 3 , wherein each of the pairs of memory cells further comprises:
a pair of second spacers of material formed along the sidewalls of the trench and laterally adjacent to the segments of the conductive and the dielectric materials.