IP Library Granted Patent US 6,967,524
Granted Patent B2
US 6,967,524 · App. 10/990,786 · Granted Nov 22, 2005

High voltage generation and regulation system for digital multilevel nonvolatile memory

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Quick Facts
Patent No.
US 6,967,524
App. No.
10/990,786
Granted
Nov 22, 2005
Kind
B2
Abstract

A high voltage generator provides high voltage signals with different regulated voltage levels. A charge pump generates the high voltage, and includes a quadrature phase forward and backward Vt-canceling high-voltage self-biasing charge pump with a powerup-assist diode. A high voltage series regulator generates the high voltage supply levels, and includes slew rate enhancement and trimmable diode regulation. A nested loop regulator eliminates shunt regulation.

Claims (34)

1. A regulator circuit comprising:

a voltage regulator providing a regulated voltage signal in response to an input voltage signal and a control signal;

a comparator coupled to the voltage regulator to generate the control signal in response to the regulated voltage signal; and

a slew rate enhancement circuit coupled to an output of the comparator to boost the control signal in the event the regulated voltage signal has a voltage level less than a threshold voltage.

2. The regulator circuit of claim 1 wherein the slew rate enhancement circuit comprises a source follower.

3. The regulator circuit of claim 2 wherein the slew rate enhancement circuit further comprises a voltage divider to generate a divided voltage signal in response to the input voltage signal and wherein the source follower provides said boost of the control signal in response to said divided voltage signal.

4. The regulator circuit of claim 3 wherein a level of said boost of the control signal is adjustable.

5. The regulator circuit of claim 1 wherein a level of said boost of the control signal is adjustable.

6. The regulator circuit of claim 1 wherein the threshold voltage is below a peak voltage of the regulated voltage signal.

7. The regulator circuit of claim 3 further comprising a self-biasing circuit to precharge the output terminal during power up.

8. The regulator circuit of claim 2 further comprising a self-biasing circuit to precharge the output terminal during power-up.

9. The regulator circuit of claim 1 further comprising a self-biasing circuit to precharge the output terminal during power-up.

10. A high voltage series regulator comprising:

a high voltage input terminal;

an output terminal;

a first transistor including a first terminal coupled to the high voltage input terminal, including a second terminal spaced apart from said first terminal with a channel therebetween, and including a gate for controlling current in said channel;

a second transistor including a first terminal coupled to the second terminal of the first transistor, including a second terminal coupled to the output terminal to provide an output voltage thereto and spaced apart from said first terminal with a channel therebetween, and including a gate for controlling current in said channel and coupled to the gate of the first transistor;

a feedback voltage generator coupled to the output terminal to generate a feedback voltage in response to the output voltage; and

a comparator having a first input coupled to the feedback voltage generator, a second input coupled to a reference voltage terminal and an output coupled to the gates of the first and second transistors.

11. The high voltage series regulator of claim 10 wherein the feedback voltage generator is a voltage divider.

12. The high voltage series regulator of claim 11 wherein the voltage divider comprises:

a plurality of third transistors coupled in series between the output terminal and a ground terminal, each of the plurality of third transistors being diode connected, one of the plurality of third transistors providing the feedback voltage.

13. The high voltage series regulator of claim 12 wherein the voltage divider further comprises a fourth transistor coupled between another one of the plurality of third transistors and ground to float a voltage of a terminal of said another one of the plurality of third transistor in response to a power down signal.

14. The high voltage series regulator of claim 13 wherein at least one of the plurality of third transistors is selectively shunted.

15. The high voltage series regulator of claim 12 wherein at least one of the plurality of third transistors is selectively shunted.

16. The high voltage series regulator of claim 11 wherein the voltage divider comprises a plurality of p-channel diodes coupled in series between the output terminal and a second terminal at a voltage less than the voltage of the output terminal.

17. The high voltage series regulator of claim 11 further comprising a trimming circuit to selectively select ones of said plurality of third transistors.

18. The high voltage series regulator of claim 17 wherein the trimming circuit comprises a plurality of fourth transistors coupled in series, each of the plurality of fourth transistors including first and second terminal coupled to respective first and second terminals of a corresponding one of the plurality of third transistors and including a gate coupled to a respective select signal to change the feedback voltage.

19. The high voltage series regulator of claim 10 further comprising a filter coupled between the high voltage input terminal and the comparator.

20. The high voltage series regulator of claim 19 wherein the filter is a resistor-capacitor filter.

21. The high voltage series regulator of claim 10 further comprising:

a third transistor including a first terminal coupled to a supply voltage, including a second terminal spaced apart from said first terminal with a channel therebetween, and including a gate coupled to said first terminal for controlling current in said channel, and

a fourth transistor including a first terminal coupled to the second terminal of the third transistor, including a second terminal coupled to the output terminal and spaced apart from said first terminal with a channel therebetween, and including a gate for controlling current in said channel in response to a control voltage applied thereto, the control voltage being a function of the voltage on the output terminal.

22. The high voltage series regulator of claim 21 wherein the voltage of the control voltage biases the fourth transistor to prevent breakdown of the fourth transistor.

Assignments (14)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: SILICON STORAGE TECHNOLOGY, INC.
Reel/Frame 059687/0344 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: SILICON STORAGE TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041675/0316 →