IP Library Granted Patent US 7,276,747
Granted Patent B2
US 7,276,747 · App. 11/112,570 · Granted Oct 2, 2007

Semiconductor device having screening electrode and method

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Quick Facts
Patent No.
US 7,276,747
App. No.
11/112,570
Granted
Oct 2, 2007
Kind
B2
Abstract

In one embodiment, a semiconductor device is formed in a body of semiconductor material. The semiconductor device includes a screening electrode spaced apart from a channel region.

Claims (36)

1. A semiconductor device, comprising:

a substrate having a major surface, wherein the substrate comprises a first conductivity type;

a pedestal structure formed overlying a portion of the major surface;

a conductive material disposed along a side surface of the pedestal structure to define an edge of a first conduction electrode of the semiconductor device;

a first doped region of a second conductivity type formed in the major surface adjacent the first conduction electrode, wherein a portion of the first doped region forms a channel region when the semiconductor device is in operation;

a first current carrying region of the first conductivity type formed in the first doped region; and

a screening electrode formed adjacent the major surface and in proximity to the first doped region, wherein the screening electrode comprises:

a trench formed in the major surface;

a dielectric layer formed over surfaces of the trench; and

a conductive layer formed over the dielectric layer.

2. The semiconductor device of claim 1 , wherein the substrate includes a semiconductor layer of a first conductivity type formed over the substrate, wherein the semiconductor layer has a lower doping concentration than the substrate.

3. The semiconductor device of claim 2 further comprising a second doped region of the first conductivity type formed adjacent the major surface between the first doped region and the screening electrode.

4. The semiconductor device of claim 1 , wherein the substrate comprises one of silicon-germanium, silicon-germanium-carbon, or carbon doped silicon.

5. The semiconductor device of claim 1 , wherein the conductive layer comprises polysilicon.

6. The semiconductor device of claim 5 wherein the conductive layer comprises p-type conductivity.

7. The semiconductor device of claim 5 wherein the conductive layer comprises n-type conductivity.

8. The semiconductor device of claim 1 , wherein a second surface of the substrate forms a second current carrying region.

9. The semiconductor device of claim 1 , wherein the screening electrode is coupled to the first current carrying region.

10. The semiconductor device of claim 1 , wherein the screening electrode is configured to be independently biased.

11. The semiconductor device of claim 1 , wherein the pedestal structure includes:

a first dielectric layer formed over the top surface of the substrate;

a second dielectric layer formed over the first dielectric layer; and

a conductive layer formed over the second dielectric layer, wherein the conductive layer is coupled to the conductive material.

12. A semiconductor device, comprising:

a semiconductor substrate having a semiconductor layer of a first conductivity type, wherein the semiconductor layer has a major surface;

a body region of a second conductivity type disposed in semiconductor layer for forming a channel of the semiconductor device;

a first current carrying region of the first conductivity type formed in the body region;

a gate structure formed over the top surface adjacent the channel; and

a screening electrode formed in the semiconductor layer in proximity to the body region, wherein the screening electrode comprises:

a trench formed in the major surface;

a dielectric layer formed in the trench; and

a conductive electrode formed over the dielectric layer.

13. The semiconductor device of claim 12 wherein the semiconductor layer comprises one of silicon-germanium, silicon-germanium-carbon, carbon doped silicon, or silicon carbide.

14. The semiconductor device of claim 12 , wherein the conductive electrode comprises n-type polysilicon.

15. The semiconductor device of claim 12 further comprising a pedestal structure formed over the major surface, and wherein the gate structure includes a control electrode formed along a side surface of the pedestal structure.

16. The semiconductor device of claim 12 , wherein the substrate comprises the second conductivity type.

Assignments (7)
SECURITY INTEREST Recorded Jul 13, 2023
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; GTAT CORPORATION
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064271/0971 →
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
RELEASE OF SECURITY INTEREST Recorded Sep 4, 2014
From: JPMORGAN CHASE BANK, N.A.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 033686/0092 →
SECURITY AGREEMENT Recorded Sep 10, 2007
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 019795/0808 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 25, 2005
From: LOECHELT, GARY A.; ZDEBEL, PETER J.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, L.L.C.
Reel/Frame 016505/0105 →