Multi-bit ROM cell, for storing one of n>4 possible states and having bi-directional read, an array of such cells, and a method for making the array
View Patent ↗A array of multi-bit Read Only Memory (ROM) cells is in a semiconductor substrate of a first conductivity type with a first concentration. Each ROM cell has a first and second regions of a second conductivity type spaced apart from one another in the substrate. A channel is between the first and second regions. The channel has three portions, a first portion, a second portion and a third portion. A gate is spaced apart and is insulated from at least the second portion of the channel. Each ROM cell has one of a plurality of N possible states, where N is greater than 2. The state of each ROM cell is determined by the existence or absence of extensions or halos that are formed in the first portion of the channel and adjacent to the first region and/or in the third portion of the channel adjacent to the second region. These extensions and halos are formed at the same time that extensions or halos are formed in MOS transistors in other parts of the integrated circuit device, thereby reducing cost. The array of ROM cells are arranged in a plurality of rows and columns, with ROM cells in the same row having their gates connected together. ROM cells in the same column have the first regions connected in a common first column, and second regions connected in common second column. Finally, ROM cells in adjacent columns to one side share a common first column, and cells in adjacent columns to another side share a common second column.
1. A method of making an array of Read Only Memory (ROM) cells arranged in a plurality of columns and rows in a semiconductor substrate of a first conductivity type having a first concentration, wherein said array of ROM cells having a plurality of ROM cells in each column and a plurality of ROM cells in each row, wherein ROM cells in adjacent columns share a common column line with each ROM cell defined by a first column line, a second column line with a channel therebetween, said channel having three portions: a first portion adjacent said first column line, a third portion adjacent said second column line and a second portion between said first portion and said third portion, and a gate for controlling the conduction of charges in said channel; said method comprising:
implanting said substrate to form a plurality of spaced apart first regions of a second conductivity type, parallel to one another, in said column direction, in said substrate, wherein each first region being said common column line between adjacent columns of ROM cells;
masking said array:
1) to permit implanting a first select of said ROM cells wherein for each ROM cell, implant would occur in an extension region adjacent to its associated first column line by a conductivity type or a concentration different from said first conductivity type and said first concentration to form a first state of said ROM cell; or
2) to permit implanting a second select of said ROM cells wherein for each ROM cell, implant would occur in an extension region adjacent to its associated second column line by a conductivity type or a concentration different from said first conductivity type and said first concentration to form a second state of said ROM cell; or
3) to permit implanting a third select of said ROM cells wherein for each ROM cell, implanting would occur in an extension region adjacent to its associated first column line by a conductivity type or a concentration different from said first conductivity type and said first concentration, and in an extension region adjacent to its associated second column line by a conductivity type or a concentration different from said first conductivity type and said first concentration, to form a third state of said ROM cell; or
4) to permit no implanting a fourth select of said ROM cells, wherein for each ROM cell, no implanting would occur either in an extension region adjacent to its associated first column line or in an extension region adjacent to its associated second column line, to form a fourth state of said ROM cell; and
implanting said array masked to form said first, second, third or fourth state of said ROM cells; and
masking said array to permit implanting a fifth select of said ROM cells wherein for each ROM cell, implanting would occur in its associated second portion of said channel for setting the threshold voltage of said cell to one of a plurality of possible voltages; and
implanting said array to set the threshold voltages for said fifth select of said ROM cells.