Method and apparatus for detection of high-speed electrical signals
View Patent ↗A signal detector includes, in part, first and second peak detectors, a comparator and an amplifier. The first peak detector generates a first signal in response to receiving an incoming signal. The second peak detector generates a second signal in response to receiving a threshold signal. The comparator generates an output signal representing the detected signal in response to the first and second signals. The amplifier amplifies the difference between the second signal and a reference voltage and, in response, generates a control signal that controls the gain of the first and second peak detectors. Each of the first and second peak detectors optionally include a differential amplifier and a pair of common-gate amplifiers each coupled to one of the output terminals of its associated differential amplifier. An RC network may be coupled to a common terminal of the first and second common gate amplifiers of each peak detector.
1. A signal detector comprising:
a first peak detector adapted to receive an incoming signal and generate a first signal;
a second peak detector adapted to receive a threshold signal and generate a second signal;
a comparator adapted to generate an output signal responsive to said first and second signals; and
an amplifier adapted to receive the second signal and a reference voltage signal and to generate a control signal that controls a gain of each of the first and second peak detectors.
2. The signal detector of claim 1 wherein said incoming signal is a differential signal comprising a differentially positive signal and a differentially negative signal, said first peak detector comprising:
a first differential amplifier receiving the incoming signal;
a first common-gate amplifier coupled to a first output terminal of the differential amplifier; and
a second common-gate amplifier coupled to a second output terminal of the differential amplifier.
3. The signal detector of claim 2 further comprising:
a first RC network coupled to a common terminal of the first and second common gate amplifiers.
4. The signal detector of claim 3 wherein said threshold signal is a differential signal comprising a differentially positive signal and a differentially negative signal, said second peak detector comprising:
a second differential amplifier receiving the threshold signal;
a third common-gate amplifier coupled to a first output terminal of the differential amplifier; and
a fourth common-gate amplifier coupled to a second output terminal of the differential amplifier.
5. The signal detector of claim 4 further comprising:
a second RC network coupled to a common terminal of the first and second common gate amplifiers disposed in the second peak detector.
6. The signal detector of claim 5 wherein said first differential amplifier further comprises:
a first voltage level shifting circuit configured to power the first differential amplifier.
7. The signal detector of claim 6 wherein said second differential amplifier further comprises:
a second voltage level shifting circuit configured to power the second differential amplifier.
8. The signal detector of claim 5 further comprising:
a first voltage source applied between the input terminals of the first differential amplifier; and
a second voltage source applied between the input terminals of the second differential amplifier.
9. The signal detector of claim 8 further comprising:
a third voltage source having a positive terminal applied to the gate terminals of the first and second common-gate amplifiers and a negative terminal applied to the gate terminals of the third and fourth common-gate amplifiers.
10. The signal detector of claim 5 further comprising:
a chopper cancellation circuit coupled to the input terminals of the second differential amplifier.
11. The signal detector of claim 10 wherein said chopper cancellation circuit comprises:
a first switch adapted to supply the differentially positive threshold signal to a positive input terminal of the second differential amplifier during a first phase of a clock signal;
a second switch adapted to supply the differentially negative threshold signal to the a negative input terminal of the second differential amplifier during the first phase of the clock signal;
a third switch adapted to supply the differentially positive threshold signal to the negative input terminal of the second differential amplifier during a second phase of the clock signal; and
a fourth switch adapted to supply the differentially negative threshold signal to the positive input terminal of the second differential amplifier during the second phase of the clock signal; wherein said and second phases are 180 degrees apart.
12. A method of detecting an incoming signal, the method comprising:
detecting a peak associated with the incoming signal in accordance with a gain value;
detecting a peak associated with a threshold signal in accordance with the gain value;
comparing the detected peak of the incoming signal with the detected peak of the threshold signal;
amplifying a difference between the detected peak of the threshold signal with a reference signal to generate a control signal; and
varying the gain value in accordance with the control signal.
13. The method of claim 12 wherein said incoming signal is a differential signal comprising a differentially positive signal and a differentially negative signal, said detecting of the peak associated with the incoming signal comprising:
applying the differential incoming signal to a first differential amplifier;
coupling a first common-gate amplifier to a first output terminal of the first differential amplifier; and
coupling a second common-gate amplifier to a second output terminal of the first differential amplifier.
14. The method of claim 13 further comprising:
forming an average of current peaks flowing through the first and second common gate amplifiers.
15. The method of claim 14 wherein said threshold signal is a differential signal comprising a differentially positive signal and a differentially negative signal, said detecting of the peak associated with the threshold signal comprising:
applying the differential threshold signal to a second differential amplifier;
coupling a third common-gate amplifier to a first output terminal of the second differential amplifier; and
coupling a fourth common-gate amplifier to a second output terminal of the second differential amplifier.
16. The method of claim 15 further comprising:
forming an average of current peaks flowing through the third and fourth common gate amplifiers.
17. The method of claim 16 further comprising:
shifting a level of voltage powering the first differential amplifier.
18. The method of claim 17 further comprising:
shifting a level of voltage powering the second differential amplifier.
19. The method of claim 16 further comprising
applying a first voltage between the input terminals of the first differential amplifier; and
applying a second voltage between the input terminals of the second differential amplifier.
20. The method of claim 19 further comprising
coupling a positive terminal of a third voltage source to the gate terminals of the first and second common-gate amplifiers and coupling a negative terminal of the third voltage source to the gate terminals of the third and fourth common-gate amplifiers.
21. The method of claim 16 further comprising
chopper canceling the differential threshold signal before applying the differential threshold signal to the input terminals of the second differential amplifier.
22. The method of claim 21 wherein the step of chopper canceling comprises:
supplying the differentially positive threshold signal to a positive input terminal of the second differential amplifier during a first phase of a clock signal;
supplying the differentially negative threshold signal to the a negative input terminal of the second differential amplifier during the first phase of the clock signal;
supplying the differentially positive threshold signal to the negative input terminal of the second differential amplifier during a second phase of the clock signal; and
supplying the differentially negative threshold signal to the positive input terminal of the second differential amplifier during the second phase of the clock signal; wherein said and second phases are 180 degrees apart.