Method of programming a non-volatile memory cell by controlling the channel current during the rise period
View Patent ↗A method to eliminate program deceleration and to enhance the resistance to program disturbance of a non-volatile floating gate memory cell is disclosed. This method eliminates or minimizes the impact of the hole displacement current. This can be done, for example, by increasing the rise time of the high programming voltage applied to the high voltage terminal. Alternatively, the transistor of the non-volatile floating gate memory cell can be turned off until the voltage applied to the high voltage terminal has reached the programming voltage. This can be done, for example by delaying the voltage applied to either the low voltage terminal or to the control gate to turn on the transistor until the voltage at the high voltage terminal has past the ramp up voltage and has reached a level programming voltage.
1. A method of programming a floating gate transistor having a first region and a second region in a semiconductor substrate with a channel region between the first region and the second region, a floating gate spaced apart from the channel region for controlling the flow of current therein, wherein said floating gate is programmed by either channel hot electron injection or by source side injection, wherein said method comprising:
applying a first voltage to said first region, wherein said first voltage is characterized by a rise period, a programming period, and a fall period; and
turning off the flow of channel current from said first region to said second region during said rise period.
2. The method of claim 1 wherein during said rise period, said first voltage is increased from a starting voltage to a programming voltage, said turning off comprises:
applying a second voltage to said second region, wherein said second voltage is of a first magnitude sufficient to turn off the flow of channel current from said first region during said rise period.
3. The method of claim 2 further comprising:
decreasing said first magnitude to a second magnitude wherein said second magnitude is sufficient to cause a current to flow from said first region to said second region.
4. The method of claim 1 further comprising
turning off the flow of channel current from said first region to said second region during said fall period.
5. The method of claim 4 wherein during said fall period said first voltage is decreased from the programming voltage to an ending voltage, wherein said turning off comprises:
applying a second voltage to said second region, wherein said second voltage is of a second magnitude sufficient to turn off the flow of channel current from the first region during said fall period.
6. The method of claim 1 wherein said floating gate storage transistor is of a split gate type wherein said floating gate is positioned for controlling the flow of current over a first portion of the channel region, and a control gate laterally spaced apart from the floating gate and insulated from the channel region for controlling the flow of current over a second portion of the channel region, wherein said turning off comprises:
applying a second voltage to said control gate to turn off the flow of channel current from said first region to said second region during said rise period.
7. The method of claim 6 wherein said method further comprises:
applying a third voltage to said control gate to turn off the flow of channel current from said first region to said second region during said fall period.
8. The method of claim 1 wherein said floating gate storage transistor is of a stacked gate type and has a control gate capacitively coupled to the floating gate for controlling the flow of current over the channel region, wherein said turning off comprises:
applying a second voltage to said control gate to turn off the flow of channel current from said first region to said second region during said rise period.
9. The method of claim 8 wherein said method further comprises:
applying a third voltage to said control gate to turn off the flow of channel current from said first region to said second region during said fall period.