IP Library Granted Patent US 7,929,354
Granted Patent B2
US 7,929,354 · App. 12/384,932 · Granted Apr 19, 2011

Verified purge for flash storage device

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Quick Facts
Patent No.
US 7,929,354
App. No.
12/384,932
Granted
Apr 19, 2011
Kind
B2
Abstract

A flash storage device includes flash storage units that are purged in response to a condition or command wherein, during or subsequent to the purge, the purge is verified. A flash controller interface receives a command for purging the flash storage device and provides a purge command to flash controllers in the flash storage device. Alternatively, the flash storage device detects a condition in response to which the flash controller interface provides a purge command to the flash controllers. Each flash controller independently erases a flash storage unit in response to receiving the purge command such that the flash storage units are erased substantially in parallel with each other. The purge of the flash storage device is subsequently verified.

Claims (46)

1. A method for purging a flash storage device comprising a plurality of flash storage units, each flash storage unit comprising a plurality of flash storage blocks comprising at least one data block for storing user data and at least one control block for storing control data for the flash storage unit, the method comprising:

receiving a first command;

erasing the plurality of flash storage units substantially in parallel in response to receiving the first command, wherein erasing the plurality of flash storage units comprises successively writing a plurality of data patterns into the at least one data block in each flash storage unit; and

verifying the erasure of the plurality of flash storage units by reading the at least one data block in each flash storage unit and comparing the read results with a final data pattern written to the at least one data block.

2. The method of claim 1 ,

wherein verifying the erasure of the plurality of flash storage units comprises reading the at least one data block in each flash storage unit after each of the plurality of data patterns has been written and comparing the read results with the respective data pattern written.

3. The method of claim 2 , wherein writing the plurality of data patterns into each data block of each flash storage block in the plurality of flash storage units comprises:

writing a first data pattern into each data block of each flash storage unit in the plurality of flash storage units;

writing a second data pattern into each data block of each flash storage unit of the plurality of flash storage units; and

writing a third data pattern into each data block of each flash storage unit of the plurality of flash storage units.

4. The method of claim 1 , wherein erasing the plurality of flash storage units substantially in parallel in response to receiving the first command comprises:

erasing the at least one data block in each flash storage unit of the plurality of flash storage units; and

erasing the at least one control block in each flash storage unit of the plurality of flash storage units.

5. The method of claim 1 , further comprising:

initializing the at least one data block in each flash storage unit of the plurality of flash storage units after erasing the at least one data block in the flash storage unit;

initializing the at least one control block in each flash storage unit of the plurality of flash storage units after erasing the at least one control block in the flash storage unit;

determining a status for each flash storage block of the plurality of flash storage blocks in each flash storage unit; and

storing the status of each flash storage block of the plurality of flash storage blocks of each flash storage unit.

6. The method of claim 5 , wherein storing the status for each flash storage block of the plurality of flash storage blocks of each flash storage unit comprises:

generating a table for each flash storage unit, the table comprising the status of each flash storage block of the plurality of flash storage blocks in the flash storage unit; and

storing the table of each flash storage unit.

7. The method of claim 1 , further comprising generating the first command based on a condition of the flash storage device.

8. A system comprising:

a plurality of flash storage units, each flash storage unit comprising a plurality of flash storage blocks comprising at least one data block for storing user data and at least one control block for storing control data for the flash storage unit; and

a plurality of flash storage controllers, each flash storage controller of the plurality of flash storage controllers coupled in communication with a corresponding flash storage unit of the plurality of flash storage units, the plurality of flash storage controllers configured to receive a first command, to erase the plurality of flash storage units substantially in parallel in response to receiving the first command, and to verify the erasure of the plurality of the flash storage units,

wherein erasing the plurality of flash storage units comprises successively writing a plurality of data patterns into the at least one data block in each flash storage unit, and

wherein verifying the erasure of the plurality of flash storage units comprises reading the at least one data block in each flash storage unit and comparing the read results with a final data pattern written to the at least one data block.

9. The system of claim 8 , further comprising a flash controller interface configured to receive a second command for purging the plurality of flash storage units, generate the first command based on the second command, and to provide the first command to each flash storage controller of the plurality of flash storage controllers.

10. The system of claim 8 ,

wherein verifying the erasure of the plurality of flash storage units comprises reading the at least one data block in each flash storage unit after each of the data patterns has been written and comparing the read results with the respective data pattern written.

11. The system of claim 10 , wherein each flash controller of the plurality of flash controllers is further configured to erase the at least one data block in the flash storage unit corresponding to the flash controller by successively writing a first data pattern, a second data pattern, and a third data pattern into each data block of the at least one data block.

12. The system of claim 8 , wherein the flash controller corresponding to each flash storage unit is further configured to erase both the at least one data block and the at least one control block in the flash storage unit in response to receiving the first command, wherein the plurality of flash storage blocks in at least one flash storage unit of the plurality of flash storage units further comprises at least one spare block, and wherein the flash controller corresponding to the flash storage unit comprising the at least one spare block is further configured to erase the at least one spare block in response to receiving the first command, and wherein the each flash controller of the plurality of flash controllers is further configured to generate a table including the status of each flash storage block in the plurality of flash storage blocks of the flash storage unit corresponding to the flash controller and to store the table in the flash storage unit.

13. The system of claim 8 , further comprising a processor coupled to a flash controller interface and configured to generate the first command, wherein the processor is further configured to generate the first command based on a condition of the system.

14. A system for purging a flash storage device comprising a plurality of flash storage units, each flash storage unit comprising a plurality of flash storage blocks comprising at least one data block for storing user data and at least one control block for storing control data for the flash storage unit, the method comprising:

means for receiving a first command;

means for erasing the plurality of flash storage units substantially in parallel in response to receiving the first command, wherein erasing the plurality of flash storage units comprises successively writing a plurality of data patterns into the at least one data block in each flash storage unit; and

means for verifying the erasure of the plurality of the flash storage units by reading the at least one data block in each flash storage unit and comparing the read results with a final data pattern written to the at least one data block.

15. The system of claim 14 ,

wherein verifying the erasure of the plurality of flash storage units comprises reading the at least one data block in each flash storage unit after each of the plurality of data patterns has been written and comparing the read results with the respective data pattern written.

16. The system of claim 14 , the system further comprising:

means for erasing the at least one data block;

means for erasing the at least one control block;

means for initializing the at least one data block;

means for initialization the at least one control block;

means for determining a status for each flash storage block in each flash storage unit of the plurality of flash storage units; and

means for storing the status of each flash storage block of each flash storage unit.

Assignments (13)
SECURITY AGREEMENT (SUPPLEMENTAL) Recorded Nov 14, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 069411/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2024
From: SANDISK TECHNOLOGIES, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 069168/0273 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 16, 2018
From: HGST TECHNOLOGIES SANTA ANA, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 046174/0446 →
MERGER AND CHANGE OF NAME Recorded Aug 23, 2016
From: SIMPLETECH, INC.; STEC, INC.
To: STEC, INC.
Reel/Frame 039512/0985 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 19, 2016
From: SALESSI, NADER; TORABI, HOOSHMAND; CHENG, CHAK-FAI; GAZERI, HOSEIN; MATAYA, RICHARD
To: SIMPLETECH, INC.
Reel/Frame 039490/0751 →
CHANGE OF NAME Recorded Jul 1, 2015
From: STEC, INC.
To: HGST TECHNOLOGIES SANTA ANA, INC.
Reel/Frame 036042/0390 →