Redundant data distribution in a flash storage device
View Patent ↗A flash storage device comprises a plurality of channels of flash storage, a system memory, and a controller. The controller is configured to cache, in the system memory, data to be written, to partition the data into a plurality of data portions, to generate error correction information based on the plurality of data portions, to write the error correction information to a first one or more of the plurality of channels of flash storage, and to write each of the plurality of data portions to a different one of the plurality of channels of flash storage other than the first one or more thereof.
1. A flash storage device, comprising:
a plurality of channels of flash storage;
a system memory; and
a controller configured to:
cache, in the system memory, data to be written;
partition the data into a plurality of data portions;
generate error correction information based on the plurality of data portions;
write the error correction information to a first one or more of the plurality of channels of flash storage; and
write each of the plurality of data portions to a different one of the plurality of channels of flash storage other than the first one or more thereof,
wherein the controller is further configured to compress the plurality of data portions before generating the error correction information.
2. The flash storage device according to claim 1 , wherein the plurality of channels comprises n channels, and wherein the controller is configured to partition the data into n−1 data portions.
3. The flash storage device according to claim 1 , wherein the plurality of channels comprises n channels, wherein the first one or more channels comprises m channels, and wherein the controller is configured to partition the data into n−m data portions.
4. The flash storage device according to claim 1 , wherein the plurality of channels comprises n channels, wherein the first one or more channels comprises m channels, and wherein the controller is configured to partition the data into fewer than n−m data portions.
5. The flash storage device according to claim 1 , wherein the data portions and the error correction information are written to a same address in each of the corresponding channels.
6. The flash storage device according to claim 1 , wherein the controller is configured to generate the error correction information by performing an XOR operation on the plurality of data portions.
7. The flash storage device according to claim 1 , wherein the controller is configured to generate the error correction information using error-correcting code on the plurality of data portions.
8. The flash storage device according to claim 1 , wherein the controller is further configured to determine a number of data portions into which the data is partitioned based upon a number of available data segments in the plurality of channels of flash storage.
9. A method of writing data to a flash storage device, comprising the steps of:
caching, in a system memory, data to be written;
partitioning the data into a plurality of data portions;
compressing the plurality of data portions;
generating error correction information based on the compressed plurality of data portions;
writing the error correction information to a first one or more of a plurality of channels of flash storage of the flash storage device; and
writing each of the plurality of data portions to a different one of the plurality of channels of flash storage other than the first one or more thereof.
10. The method according to claim 9 , wherein the plurality of channels comprises n channels, and wherein the data is partitioned into n−1 data portions.
11. The method according to claim 9 , wherein the plurality of channels comprises n channels, wherein the first one or more channels comprises m channels, and wherein the data is partitioned into n−m data portions.
12. The method according to claim 9 , wherein the plurality of channels comprises n channels, wherein the first one or more channels comprises m channels, and wherein the data is partitioned into fewer than n—m data portions.
13. The method according to claim 9 , wherein the data portions and the error correction information are written to a same address in each of the corresponding channels.
14. The method according to claim 9 , wherein the error correction information is generated by performing an XOR operation on the plurality of data portions.
15. The method according to claim 9 , wherein the error correction information is generated using error-correcting code on the plurality of data portions.
16. The method according to claim 9 , further comprising:
determining a number of data portions into which the data is partitioned based upon a number of available data segments in the plurality of channels of flash storage.
17. A flash storage device, comprising:
a plurality of channels of flash storage;
a system memory; and
a controller configured to:
cache, in the system memory, data to be written;
partition the data into a plurality of data portions;
generate error correction information based on the plurality of data portions;
write the error correction information to a first one or more of the plurality of channels of flash storage; and
write each of the plurality of data portions to a different one of the plurality of channels of flash storage other than the first one or more thereof,
wherein the controller is further configured, upon a read count for one of the plurality of data portions in the corresponding channel of flash storage exceeding a predetermined amount, to:
invalidate data from one of the plurality of data portions; and
leave intact the invalidated data for use in error correction of the other ones of the plurality of data portions.
18. The flash storage device according to claim 17 , wherein the plurality of channels comprises n channels, and wherein the controller is configured to partition the data into n−1 data portions.
19. The flash storage device according to claim 17 , wherein the plurality of channels comprises n channels, wherein the first one or more channels comprises m channels, and wherein the controller is configured to partition the data into n−m data portions.
20. The flash storage device according to claim 17 , wherein the plurality of channels comprises n channels, wherein the first one or more channels comprises m channels, and wherein the controller is configured to partition the data into fewer than n−m data portions.
21. The flash storage device according to claim 17 , wherein the data portions and the error correction information are written to a same address in each of the corresponding channels.
22. The flash storage device according to claim 17 , wherein the controller is configured to generate the error correction information by performing an XOR operation on the plurality of data portions.
23. The flash storage device according to claim 17 , wherein the controller is configured to generate the error correction information using error-correcting code on the plurality of data portions.
24. The flash storage device according to claim 17 , wherein the controller is further configured to determine a number of data portions into which the data is partitioned based upon a number of available data segments in the plurality of channels of flash storage.
25. A method of writing data to a flash storage device, comprising the steps of:
caching, in a system memory, data to be written;
partitioning the data into a plurality of data portions;
generating error correction information based on the plurality of data portions;
writing the error correction information to a first one or more of a plurality of channels of flash storage of the flash storage device;
writing each of the plurality of data portions to a different one of the plurality of channels of flash storage other than the first one or more thereof;
invalidating data from one of the plurality of data portions; and
leaving intact the invalidated data for use in error correction of the other ones of the plurality of data portions.
26. The method according to claim 25 , wherein the plurality of channels comprises n channels, and wherein the data is partitioned into n−1 data portions.
27. The method according to claim 25 , wherein the plurality of channels comprises n channels, wherein the first one or more channels comprises m channels, and wherein the data is partitioned into n−m data portions.
28. The method according to claim 25 , wherein the plurality of channels comprises n channels, wherein the first one or more channels comprises m channels, and wherein the data is partitioned into fewer than n−m data portions.
29. The method according to claim 25 , wherein the data portions and the error correction information are written to a same address in each of the corresponding channels.
30. The method according to claim 25 , wherein the error correction information is generated by performing an XOR operation on the plurality of data portions.
31. The method according to claim 25 , wherein the error correction information is generated using error-correcting code on the plurality of data portions.
32. The method according to claim 25 , further comprising:
determining a number of data portions into which the data is partitioned based upon a number of available data segments in the plurality of channels of flash storage.