IP Library Granted Patent US 8,144,515
Granted Patent B2
US 8,144,515 · App. 12/508,538 · Granted Mar 27, 2012

Interleaved flash storage system and method

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Quick Facts
Patent No.
US 8,144,515
App. No.
12/508,538
Granted
Mar 27, 2012
Kind
B2
Abstract

A flash storage system accesses data interleaved among flash storage devices. The flash storage system receives a data block including data portions, stores the data portions in a data buffer, and initiates data transfers for asynchronously writing the data portions into storage blocks interleaved among the flash storage devices. Additionally, the flash storage system may asynchronously read data portions of a data block interleaved among the storage blocks, store the data portions in the data buffer, and access the data portions from the data buffer.

Claims (40)

1. A method comprising:

receiving a data block comprising a first plurality of data portions; storing the data block in a data buffer;

identifying a plurality of storage blocks interleaved among a plurality of flash storage devices; and

initiating a plurality of data transfers for writing the data portions of the data block asynchronously into the plurality of storage blocks, wherein initiating the plurality of data transfers comprises:

writing at least two data portions of the data block into the plurality of storage blocks in parallel; and

writing at least two data portions of the data block into a storage block of the plurality of storage blocks serially.

2. The method of claim 1 , wherein each data portion of the first plurality of data portions comprises an address of a sequence of addresses, and wherein receiving the data portions of the first plurality of data portions serially comprises receiving the data portions of the plurality of data portions in sequential order according to the sequence of addresses.

3. A method comprising:

receiving a data block comprising a first plurality of data portions;

storing the data block in a data buffer;

identifying a plurality of storage blocks interleaved among a plurality of flash storage devices;

erasing the plurality of storage blocks after receiving the data block; and

initiating a plurality of data transfers for writing the data portions of the data block asynchronously into the plurality of storage blocks,

wherein receiving the data block further comprises:

reading a data portion of the data block from a storage block of the plurality of storage blocks; and

writing the data portion of the data block read from the plurality of storage blocks into the data buffer after erasing the plurality of storage blocks.

4. A method comprising:

receiving a data block comprising a first plurality of data portions;

storing the data block in a data buffer;

identifying a plurality of storage blocks interleaved among a plurality of flash storage devices;

erasing the plurality of storage blocks after receiving the data block; and

initiating a plurality of data transfers for writing the data portions of the data block asynchronously into the plurality of storage blocks,

wherein receiving the data block further comprises:

initiating a plurality of data transfers for reading a second plurality of data portions of the data block asynchronously from the plurality of storage blocks; and

writing the second plurality of data portions into the data buffer in parallel after erasing the plurality of storage blocks.

5. A system comprising:

a data buffer configured to receive and store a data block comprising a first plurality of data portions;

a plurality of flash storage devices comprising a plurality of storage blocks interleaved among the flash storage devices; and

a controller coupled to the data buffer and the plurality of flash storage devices, the controller configured to initiate a plurality of data transfers for writing the data portions of the data block asynchronously into the plurality of storage blocks,

wherein the controller is further configured to read the data portions of the data block from the data buffer serially, write at least two data portions of the data block into the plurality of flash storage devices in parallel, and write at least two data portions of the data block into a storage block of a flash storage device in the plurality of flash storage devices serially.

6. A system comprising:

a data buffer configured to receive and store a data block comprising a first plurality of data portions;

a plurality of flash storage devices comprising a plurality of storage blocks interleaved among the flash storage devices; and

a controller coupled to the data buffer and the plurality of flash storage devices, the controller configured to erase the plurality of storage blocks after the data buffer receives the data block and to initiate a plurality of data transfers for writing the data portions of the data block asynchronously into the plurality of storage blocks,

wherein the controller is further configured to initiate a data transfer to read a data portion of the data block from a storage block of the plurality of storage blocks and to write the data portion of the data block into the data buffer before erasing the plurality of storage blocks.

7. A system comprising:

a data buffer configured to receive and store a data block comprising a first plurality of data portions;

a plurality of flash storage devices comprising a plurality of storage blocks interleaved among the flash storage devices; and

a controller coupled to the data buffer and the plurality of flash storage devices, the controller configured to erase the plurality of storage blocks after the data buffer receives the data block and to initiate a plurality of data transfers for writing the data portions of the data block asynchronously into the plurality of storage blocks,

wherein the controller is further configured to initiate a data transfer to read a second plurality of data portions of the data block from the plurality of storage blocks and to write the second plurality of data portions into the data buffer before erasing the plurality of storage blocks.

Assignments (12)
SECURITY AGREEMENT (SUPPLEMENTAL) Recorded Nov 14, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 069411/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2024
From: SANDISK TECHNOLOGIES, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 069168/0273 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 16, 2018
From: HGST TECHNOLOGIES SANTA ANA, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 046174/0446 →
CHANGE OF NAME Recorded Jul 1, 2015
From: STEC, INC.
To: HGST TECHNOLOGIES SANTA ANA, INC.
Reel/Frame 036042/0390 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 7, 2009
From: MOSHAYEDI, MARK
To: STEC, INC.
Reel/Frame 023340/0650 →