System and method of maintaining data integrity in a flash storage device
View Patent ↗A flash storage device includes a power hold circuit including a double layer capacitor. A power source supplies power to the flash storage device and charges the double layer capacitor. The double layer capacitor supplies power for maintaining integrity of data during a data transfer occurring in the flash storage device when the power supplied by the power source is disrupted. Additionally, the flash storage device can inhibit subsequent data transfers until the power supplied by the power source is restored.
1. A method of maintaining data integrity in a flash storage device comprising a double layer capacitive element including at least one double layer capacitor, the method comprising:
supplying a first voltage;
charging the double layer capacitive element in the flash storage device to a second voltage in response to the first voltage;
writing data comprising a plurality of data portions into a data buffer in the flash storage device;
initiating a data transfer in the flash storage device before the first voltage drops below a first threshold voltage, wherein initiating the data transfer comprises reading one or more of the plurality of data portions in the data buffer;
supplying the second voltage to the data buffer and a flash storage in the flash storage device;
completing the data transfer in the flash storage device before the second voltage drops below a second voltage threshold at which data integrity is maintained for the data transfer, wherein the data transfer comprises writing the one or more of the plurality of data portions into the flash storage;
monitoring the first voltage; and
inhibiting a subsequent data transfer from occurring if the first voltage drops below the first voltage threshold.
2. The method of claim 1 , wherein the double layer capacitive element comprises an ultracap.
3. The method of claim 1 , further comprising:
monitoring a third voltage supplied to the flash storage device by a host power source; and
initiating the data transfer in the flash storage device before the third voltage drops below a third threshold voltage.
4. A system comprising:
a power hold circuit comprising a double layer capacitive element configured to charge to a second voltage in response to a first voltage, the double layer capacitive element comprising at least one double layer capacitor;
a data buffer electrically coupled to the double layer capacitive element;
a flash storage electrically coupled to the double layer capacitive element;
a flash storage controller electrically coupled to the flash storage, the data buffer and the double layer capacitive element, the flash storage controller configured to write data for a data transfer into the data buffer, to initiate the data transfer to the flash storage by reading a data portion of the data in the data buffer and to complete the data transfer by writing the data portion into the flash storage before the second voltage drops below a second voltage threshold at which data integrity is maintained for the data transfer; and
a power monitoring circuit electrically coupled to the flash storage controller and configured to determine whether the first voltage drops below a first voltage threshold, the flash storage controller further configured to inhibit a subsequent data transfer from occurring if the first voltage drops below the first voltage threshold.
5. The system of claim 4 , wherein the flash storage controller is further configured to initiate the data transfer before the first voltage drops below a first threshold voltage.
6. The system of claim 4 , wherein the double layer capacitive element comprises an ultracap.
7. The system of claim 4 , further comprising a first power source configured to supply the first voltage.
8. The system of claim 7 , wherein the power monitoring circuit is electrically coupled to a second power source supplying a third voltage to the flash storage system, the power monitoring circuit further configured to determine whether the third voltage is below a third threshold value, the flash storage controller further configured to initiate the data transfer in the flash storage system before the third voltage drops below a third threshold voltage.
9. A system for maintaining data integrity in a flash storage device, the system comprising:
means for supplying a first voltage;
means for charging a double layer capacitive element in the flash storage device to a second voltage in response to the first voltage;
means for writing data comprising a plurality of data portions into a data buffer in the flash storage device;
means for initiating a data transfer to a flash storage in the flash storage device before the first voltage drops below a first threshold voltage, wherein initiating the data transfer comprises reading one or more of the plurality of data portions in the data buffer;
means for supplying the second voltage to the data buffer and a flash storage in the flash storage device;
means for completing the data transfer before the second voltage drops below a second voltage threshold at which data integrity is maintained for the data transfer, wherein the data transfer comprises writing the one or more of the plurality of data portions into the flash storage;
means for determining whether the first voltage drops below the first voltage threshold; and
means for inhibiting a subsequent data transfer from occurring if first voltage drops below the first voltage threshold.