IP Library Granted Patent US 7,962,687
Granted Patent B2
US 7,962,687 · App. 12/542,626 · Granted Jun 14, 2011

Flash memory allocation for improved performance and endurance

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Quick Facts
Patent No.
US 7,962,687
App. No.
12/542,626
Granted
Jun 14, 2011
Kind
B2
Abstract

A flash storage device having improved write performance is provided. The device includes a storage block having a plurality of physical pages and a controller configured to allocate subsets of the plurality of physical pages to a plurality of logical addresses, respectively, and to write data to the plurality of physical pages. Each of the subsets of physical pages includes more than one physical page. Upon receiving a first write request for one of the logical addresses, data from the first write request is written to a first physical page of the physical pages allocated to the logical address. Upon receiving a second write request for one of the logical address, the data from the second write request is written to a second physical page allocated to the logical address and the first physical page allocated to the logical address is invalidated.

Claims (34)

1. A flash storage device comprising:

a storage block having a plurality of physical pages; and

a controller configured to allocate subsets of the plurality of physical pages to a plurality of logical addresses, respectively, and to write data to the plurality of physical pages,

wherein each of the subsets of the plurality of physical pages comprises more than one physical page.

2. The flash storage device according to claim 1 , wherein all of the allocated subsets of the plurality of physical pages include an identical number of physical pages.

3. The flash storage device according to claim 2 , wherein the number of physical pages is one of 2, 4, 8 and 16.

4. The flash storage device according to claim 1 , wherein the subsets of the plurality of physical pages are allocated to the plurality of logical addresses upon flash initialization of the storage block.

5. The flash storage device according to claim 1 , wherein, in response to a first write request for one of the plurality of logical addresses, the controller is configured to write data from the first write request to a first physical page in the subset of the plurality of physical pages allocated to the one of the plurality of logical addresses, and

in response to a second write request for the one of the plurality of logical addresses, the controller is further configured to write data from the second write request to a second physical page in the subset of the plurality of physical pages allocated to the one of the plurality of logical addresses and invalidate the first physical page in the subset of the plurality of physical pages allocated to the one of the plurality of logical addresses.

6. The flash storage device according to claim 5 , wherein the controller is configured to invalidate the first physical page by setting an invalid flag in a field associated with the first physical page.

7. The flash storage device according to claim 5 , wherein the controller is configured to invalidate the first physical page by setting a pointer value in a field associated with the first physical page, wherein the pointer value identifies an available physical page in the subset of the plurality of physical pages allocated to the one of the plurality of logical addresses.

8. A flash storage device comprising:

a plurality of storage blocks, each storage block having a plurality of physical pages; and

a controller configured to allocate subsets of the plurality of physical pages in each of the plurality of storage blocks to a plurality of logical addresses, respectively, and to write data to the plurality of physical pages,

wherein each of the subsets of the plurality of physical pages comprises more than one physical page.

9. The flash storage device according to claim 8 , all of the allocated subsets of the plurality of physical pages include an identical number of physical pages.

10. The flash storage device according to claim 9 , wherein the number of physical pages is one of 2, 4, 8 and 16.

11. The flash storage device according to claim 8 , wherein each of the allocated subsets of the plurality of physical pages of a first one of the plurality of storage blocks includes a first number of physical pages and each of the allocated subsets of the plurality of physical pages of a second one of the plurality of storage blocks includes a second number of physical pages,

wherein, the first number of physical pages is different than the second number of physical pages.

12. The flash storage device according to claim 8 , wherein the subsets of the plurality of physical pages are allocated to the plurality of logical addresses upon flash initialization of the plurality of storage blocks.

13. The flash storage device according to claim 8 , wherein in response to a first write request for one of the plurality of logical addresses, the controller is configured to write data from the first write request to a first physical page in the subset of the plurality of physical pages allocated to the one of the plurality of logical addresses, and

in response to a second write request for the one of the plurality of logical addresses, the controller is further configured to write data from the second write request to a second physical page in the subset of the plurality of physical pages allocated to the one of the plurality of logical addresses and invalidate the first physical page in the subset of the plurality of physical pages allocated to the one of the plurality of logical addresses.

14. The flash storage device according to claim 13 , wherein the controller is configured to invalidate the first physical page by setting an invalid flag in a field associated with the first physical page.

15. The flash storage device according to claim 13 , wherein the controller is configured to invalidate the first physical page by setting a pointer value in a field associated with the first physical page, wherein the pointer value identifies an available physical page in the subset of the plurality of physical pages allocated to the one of the plurality of logical addresses.

16. A method for managing a flash storage device, the method comprising the steps of:

allocating subsets of a plurality of physical pages in a storage block to a plurality of logical addresses, respectively, wherein each of the subsets of the plurality of physical pages comprises more than one physical page;

receiving a first write request for one of the plurality of logical addresses; and

writing data from the first write request to a first physical page of the plurality of physical pages allocated to the one of the plurality of logical addresses.

17. The method according to claim 16 , further comprising:

receiving a second write request to the one of the plurality of logical addresses;

writing data from the second write request to a second physical page of the plurality of physical pages allocated to the one of the plurality of logical addresses; and

invalidating the first physical page.

18. The method according to claim 17 , wherein invalidating the first physical page comprises setting an invalid flag in a field associated with the first physical page.

19. The method according to claim 17 , wherein invalidating the first physical page comprises setting a pointer value in a field associated with the first physical page, wherein the pointer value identifies an available physical page in the subset of the plurality of physical pages allocated to the one of the plurality of logical addresses.

Assignments (13)
SECURITY AGREEMENT (SUPPLEMENTAL) Recorded Nov 14, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 069411/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2024
From: SANDISK TECHNOLOGIES, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 069168/0273 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 16, 2018
From: HGST TECHNOLOGIES SANTA ANA, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 046174/0446 →
MERGER AND CHANGE OF NAME Recorded Aug 23, 2016
From: SIMPLETECH, INC.; STEC, INC.
To: STEC, INC.
Reel/Frame 039512/0985 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 23, 2016
From: TORABI, HOOSHMAND
To: SIMPLETECH, INC.
Reel/Frame 039512/0433 →
CHANGE OF NAME Recorded Jul 1, 2015
From: STEC, INC.
To: HGST TECHNOLOGIES SANTA ANA, INC.
Reel/Frame 036042/0390 →