IP Library Granted Patent US 8,203,201
Granted Patent B2
US 8,203,201 · App. 12/732,465 · Granted Jun 19, 2012

Integrated circuit packaging system with leads and method of manufacture thereof

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Quick Facts
Patent No.
US 8,203,201
App. No.
12/732,465
Granted
Jun 19, 2012
Kind
B2
Abstract

A method of manufacture of an integrated circuit packaging system includes: forming a paddle, an inner post adjacent to the paddle, a jumper pad, and an outer post, with the jumper pad between the inner post and the outer post; mounting an integrated circuit over a paddle first side, the paddle first side co-planar with the outer post; connecting a first jumper interconnect between the integrated circuit and the jumper pad; connecting a second jumper interconnect between the jumper pad and the outer post; and forming an encapsulation over paddle, the integrated circuit, the first jumper interconnect, the jumper pad, and the second jumper interconnect.

Claims (68)

1. A method of manufacture of an integrated circuit packaging system comprising:

forming a paddle, an inner post adjacent to the paddle, a jumper pad, and an outer post, with the jumper pad between the inner post and the outer post;

mounting an integrated circuit over a paddle first side, the paddle first side co-planar with the outer post;

connecting a first jumper interconnect between the integrated circuit and the jumper pad;

connecting a second jumper interconnect between the jumper pad and the outer post; and

forming an encapsulation over paddle, the integrated circuit, the first jumper interconnect, the jumper pad, and the second jumper interconnect, the encapsulation co-planar with the jumper pad.

2. The method as claimed in claim 1 wherein forming the jumper pad includes forming the jumper pad co-planar with the paddle first side.

3. The method as claimed in claim 1 further comprising:

forming a jumper post between the inner post and the outer post with a jumper post second side exposed and recessed from the encapsulation; and

wherein:

forming the jumper pad includes forming the jumper pad on a jumper post first side within the encapsulation.

4. The method as claimed in claim 1 wherein forming the paddle, the inner post, and the outer post includes forming a paddle extension, an inner post extension, and an outer post extension, respectively, with the paddle extension, the inner extension, and the outer extension exposed from and extending from the encapsulation.

5. A method of manufacture of an integrated circuit packaging system comprising:

forming a paddle having a paddle extension, an inner post adjacent to the paddle, the inner post having an inner post extension, a jumper pad, and an outer post having an outer post extension, with the jumper pad between the inner post and the outer post;

mounting an integrated circuit over a paddle first side co-planar with the outer post;

connecting an inner interconnect between the integrated circuit and the inner post;

connecting a first jumper interconnect between the integrated circuit and the jumper pad;

connecting a second jumper interconnect between the jumper pad and the outer post;

forming an encapsulation over paddle, the integrated circuit, the inner interconnect, the first jumper interconnect, the jumper pad, and the second jumper interconnect, with the paddle extension, the inner post extension, and the outer post extension exposed and extending from the encapsulation; and

forming an encapsulation cavity in the encapsulation between the inner post and the outer post, and exposing the jumper pad from within the encapsulation cavity.

6. The method as claimed in claim 5 further comprising:

forming an inner contact pad on the inner post; and

wherein:

connecting the inner interconnect between the integrated circuit and the inner post includes connecting the inner interconnect to the inner contact pad.

7. The method as claimed in claim 5 further comprising:

forming an outer contact pad on the outer post; and

wherein:

connecting the second jumper interconnect between the jumper pad and the outer post includes connecting the second jumper interconnect to the outer contact pad.

8. The method as claimed in claim 5 wherein forming the paddle extension, the inner post extension, and the outer post extension includes forming a barrier pad, an inner mounting pad, and an outer mounting pad on the portion of the paddle extension, the inner post extension, and the outer post extension facing away from the encapsulation, respectively.

9. An integrated circuit packaging system comprising:

a paddle having a paddle first side and the paddle second side;

an integrated circuit mounted over the paddle first side;

an inner post adjacent to the paddle;

a jumper pad adjacent to the inner post on a side opposite the paddle;

an outer post adjacent to the jumper pad, with the jumper pad between the inner post and the outer post;

a first jumper interconnect connected between the integrated circuit and the jumper pad;

a second jumper interconnect connected between the jumper pad and the outer post; and

an encapsulation over the paddle, the integrated circuit, the jumper pad, and the outer post, and wherein the jumper pad is within and exposed from the encapsulation with the exposed portion of the jumper pad co-planar with the encapsulation.

10. The system as claimed in claim 9 wherein the jumper pad is co-planar with the paddle first side.

11. The system as claimed in claim 9 further comprising:

a jumper post between the inner post and the outer post with a jumper post second side exposed and recessed from the encapsulation; and

wherein:

the jumper pad is on a jumper post first side.

12. The system as claimed in claim 9 wherein:

the paddle includes a paddle extension, the paddle extension exposed and extending from the encapsulation;

the inner post includes an inner post extension, the inner post extension exposed and extending from the encapsulation; and

the outer post includes an outer post extension, the outer post extension exposed and extending from the encapsulation.

13. The system as claimed in claim 9 further comprising:

an inner interconnect connected between the integrated circuit and the inner post; and

wherein:

the paddle includes a paddle extension, the paddle extension exposed and extending from the encapsulation;

the inner post includes an inner post extension, the inner post extension exposed and extending from the encapsulation; and

the outer post includes an outer post extension, the outer post extension exposed and extending from the encapsulation.

14. The system as claimed in claim 13 further comprising:

an inner contact pad on the inner post; and

wherein:

the inner interconnect is connected to the inner contact pad.

15. The system as claimed in claim 13 further comprising:

an outer contact pad on the outer post; and

wherein:

the second jumper interconnect is connected to the outer contact pad.

16. The system as claimed in claim 13 further comprising:

a paddle barrier on the portion of the paddle extension facing away from the encapsulation;

an inner mounting pad on the portion of the inner post extension facing away from the encapsulation; and

an outer mounting pad on the portion of the outer post extension facing away from the encapsulation.

17. The system as claimed in claim 13 wherein:

the encapsulation includes an encapsulation cavity between the inner post and the outer post; and

the jumper pad is exposed from within the encapsulation cavity.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT A TYPOGRAPHICAL ERROR ON THE COVER SHEET PREVIOUSLY RECORDED AT REEL: 038388 FRAME: 0036. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 7, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064834/0911 →
CORRECTIVE ASSIGNMENT TO CORRECT A TYPOGRAPHICAL ERROR ON THE COVER SHEET PREVIOUSLY RECORDED AT REEL: 064789 FRAME: 0885. ASSIGNOR(S) HEREBY CONFIRMS THE CORRECTIVE ASSIGNMENT. Recorded Sep 7, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064836/0363 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 38388 FRAME: 0036 Recorded Aug 31, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 064789/0885 →
RELEASE OF SECURITY INTEREST Recorded Jun 8, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052864/0057 →
CHANGE OF NAME Recorded Apr 8, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038388/0036 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 6, 2010
From: CAMACHO, ZIGMUND RAMIREZ; ESPIRITU, EMMANUEL; BATHAN, HENRY DESCALZO
To: STATS CHIPPAC LTD.
Reel/Frame 024194/0097 →