IP Library Granted Patent US 8,258,008
Granted Patent B2
US 8,258,008 · App. 12/970,755 · Granted Sep 4, 2012

Package-on-package system with via z-interconnections and method for manufacturing thereof

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,258,008
App. No.
12/970,755
Granted
Sep 4, 2012
Kind
B2
Abstract

A method for manufacturing a package-on-package system includes: providing an interposer substrate; mounting a base substrate under the interposer substrate and having a first integrated circuit die connected thereto; forming an encapsulant between the interposer substrate and the base substrate, the encapsulant encapsulating the first integrated circuit die; and forming a via z-interconnection extending through the encapsulant and one of the substrates to the other of the substrates.

Claims (79)

1. A method for manufacturing a package-on-package system comprising:

providing a base substrate;

connecting a first integrated circuit die to the base substrate;

attaching an interposer substrate over the first integrated circuit die with a lead-in-film adhesive, with the lead-in-film adhesive attached to the interposer substrate and between the interposer substrate and the first integrated circuit die;

forming an encapsulant between the interposer substrate and the base substrate, the encapsulant encapsulating the lead-in-film adhesive and the first integrated circuit die; and

forming a via z-interconnection extending through the interposer substrate and the encapsulant to the base substrate.

2. The method as claimed in claim 1 further comprising:

mounting a third integrated circuit die on the first integrated circuit die; and

wherein attaching the interposer substrate includes:

forming the lead-in-film adhesive on the interposer substrate; and

bonding the interposer substrate to the third integrated circuit die by the lead-in-film adhesive.

3. The method as claimed in claim 1 wherein forming the via z-interconnection includes:

forming a contact pad on the interposer substrate;

forming a contact pad on the base substrate; and

forming a via hole through the contact pad on the interposer substrate and the encapsulant to the contact pad on the base substrate.

4. The method as claimed in claim 1 wherein forming the via z-interconnection includes:

forming a via hole through the interposer substrate and the encapsulant to the base substrate; and

filling the via hole with a conductive material.

5. A method for manufacturing a package-on-package system comprising:

providing a strip base substrate;

connecting first integrated circuit dies to the strip base;

attaching a strip interposer substrate over the first integrated circuit dies with a lead-in-film adhesive, with the lead-in-film adhesive between the strip interposer substrate and the first integrated circuit dies;

forming a strip encapsulant between the strip interposer substrate and the strip base substrate, the strip encapsulant encapsulating the lead-in-film adhesive and the first integrated circuit dies; and

forming via z-interconnections extending through the strip interposer substrate and the strip encapsulant to the strip base substrate.

6. The method as claimed in claim 5 further comprising:

mounting third integrated circuit dies on the first integrated circuit dies; and

wherein attaching the interposer substrate includes:

forming the lead-in-film adhesive on the strip interposer substrates; and

bonding the strip interposer substrates to the third integrated circuit dies by the lead-in-film adhesive.

7. The method as claimed in claim 5 wherein forming the via z-interconnections includes:

forming contact pads on the strip interposer substrate;

forming contact pads on the strip base substrate; and

forming via holes through the contact pads on the strip interposer substrate and the strip encapsulant to the contact pads on the strip base substrate.

8. The method as claimed in claim 5 wherein forming the via z-interconnection includes:

forming via holes through the strip interposer substrate and the strip encapsulant to the strip base substrate; and

filling the via holes with conductive material.

9. A package-on-package system comprising:

a base substrate;

a first integrated circuit die connected to the base substrate;

a lead-in-film adhesive over the first integrated circuit die;

an interposer substrate attached to the lead-in-film and over the first integrated circuit die, with the lead-in-film adhesive between the interposer substrate and the first integrated circuit die;

an encapsulant between the interposer substrate and the base substrate, the encapsulant encapsulating the lead-in-film adhesive and the first integrated circuit die; and

a via z-interconnection extending through the interposer substrate and the encapsulant to the base substrate.

10. The system as claimed in claim 9 further comprising:

a third integrated circuit die on the first integrated circuit die; and

wherein:

the lead-in-film adhesive is on the interposer substrate and bonding the interposer substrate to the third integrated circuit die.

11. The system as claimed in claim 9 further comprising:

a contact pad on the interposer substrate;

a contact pad on the base substrate; and

wherein:

the interposer substrate, the encapsulant, and the base substrate include a via hole through the contact pad on the interposer substrate and the encapsulant to the contact pad on the base substrate for forming the via z-interconnection.

12. The system as claimed in claim 9 wherein:

the interposer substrate, the encapsulant, and the base substrate include a via hole through the interposer substrate and the encapsulant to the base substrate; and

further comprising:

a conductive material in the via hole for forming the via z-interconnection.

13. The system as claimed in claim 9 wherein:

the interposer substrate is a strip interposer substrate;

the first integrated circuit die is one of a plurality of first integrated circuit dies;

the base substrate is a strip base substrate under the strip interposer substrate and having the first integrated circuit dies connected thereto;

the encapsulant is a strip encapsulant between the strip interposer substrate and the strip base substrate, the strip encapsulant encapsulating the first integrated circuit dies; and

the via z-interconnection is one of a plurality of via z-interconnections extending through the strip interposer substrate and the strip encapsulant to the strip base substrate.

14. The system as claimed in claim 13 further comprising:

a second integrated circuit die is one of a plurality of second integrated circuit dies on the first integrated circuit dies and having electrical connectors to the strip base substrate; and

wherein:

the lead-in-film adhesive is on the strip interposer substrate and bonding the strip interposer substrate to the second integrated circuit dies, with the electrical connectors in the lead-in-film adhesive.

15. The system as claimed in claim 13 further comprising:

third integrated circuit dies on the first integrated circuit dies; and

wherein:

the lead-in-film adhesive is on the strip interposer substrates and bonding the strip interposer substrates to the third integrated circuit dies.

16. The system as claimed in claim 13 further comprising:

contact pads on the strip interposer substrate;

contact pads on the strip base substrate; and

wherein:

the strip interposer substrate, the encapsulant, and the base substrate include via holes through the contact pads on the strip interposer substrate and the strip encapsulant to the contact pads on the strip base substrate for forming the via z-interconnections.

17. The system as claimed in claim 13 wherein:

the strip interposer substrate, the encapsulant, and the base substrate include via holes through one of the strip substrates and the strip encapsulant to the other of the strip substrates; and

further comprising:

conductive material in the via holes for forming the via z-interconnections.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT A TYPOGRAPHICAL ERROR ON THE COVER SHEET PREVIOUSLY RECORDED AT REEL: 038388 FRAME: 0036. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 7, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064834/0911 →
CORRECTIVE ASSIGNMENT TO CORRECT A TYPOGRAPHICAL ERROR ON THE COVER SHEET PREVIOUSLY RECORDED AT REEL: 064789 FRAME: 0885. ASSIGNOR(S) HEREBY CONFIRMS THE CORRECTIVE ASSIGNMENT. Recorded Sep 7, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064836/0363 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 38388 FRAME: 0036 Recorded Aug 31, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 064789/0885 →
RELEASE OF SECURITY INTEREST Recorded Jun 8, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052864/0057 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →