Variable architecture for random number generators
A variable architecture for random number generators is disclosed. In some implementations, the architecture of a random number generator may be varied based on microcontroller-specific data stored on the microcontroller. For example, a random number generator module may be embedded in a microcontroller circuit. The random number generator module may be designed to receive input from data sources in the circuit that contain microcontroller-specific data (e.g., a unique chip identifier, data carried in fuse bits). In some implementations, the architecture of the random number generator module may be adjusted or varied based on the microcontroller-specific data.
1. A system comprising:
a variable ring oscillator including one or more digital circuit elements configured by one or more digital values unique to the system to produce a clock; and
a variable linear feedback shift register coupled to the clock and configured by the one or more digital values to produce one or more pseudo random digital values.
2. The system of claim 1 , where the one or more digital values are carried by fuse bits.
3. The system of claim 2 , where the fuse bits carry a calibration of one or more analog cells embedded in the system.
4. The system of claim 2 , where the fuse bits carry a unique identifier associated with the system.
5. The system of claim 1 , where the one or more digital values are driven by input pads of the system.
6. The system of claim 1 , where the one or more digital values are driven by outputs of flash memory embedded in the system.
7. The system of claim 6 , where the outputs of flash memory carry a calibration of analog cells embedded in the system.
8. The system of claim 6 , where the outputs of flash memory carry a unique identifier associated with the system.
9. The system of claim 1 , where the one or more digital circuit elements included in the ring oscillator and configured to modify propagation delay in the ring oscillator.
10. The system of claim 9 , where the propagation delay is modified by adding more delay elements in the ring oscillator.
11. The system of claim 10 , where one or more digital circuit elements included in the linear feedback shift register coupled to the ring oscillator are configured by the digital values to modify a polynomial describing a linear function of the linear feedback shift register.
12. The system of claim 11 , further comprising:
a combinational mixer architecture coupled to the linear feedback shift register and configured to invert at least a part of a random output signal of the combinational mixer.
13. The system of claim 1 , where the system is a microcontroller.
14. The system of claim 13 , where the one or more digital values are driven by a programmable register in the microcontroller.
15. The system of claim 14 , where the programmable register is programmed with digital values previously read from non-volatile registers of the system.
16. A method comprising:
receiving in a microcontroller data unique to the microcontroller;
adjusting a variable ring oscillator in the microcontroller using the unique data to produce a clock;
adjusting a variable linear feedback shift register in the microcontroller that is coupled to the clock using the unique data and
generating a pseudo random sequence using an adjusted linear feedback shift register.
17. The method of claim 16 , where receiving data unique to the microcontroller further comprises:
receiving at least one of fuse bits or a unique identifier of the microcontroller.
18. The method of claim 16 , where adjusting the ring oscillator further comprises:
adjusting a propagation delay of the ring oscillator in a pseudo random number generator.
19. The method of claim 18 , where adjusting the linear feedback shift register further comprises:
modifying a polynomial describing a linear function of a linear feedback shift register coupled to the ring oscillator.
20. The method of claim 19 , further comprising:
inverting at least a part of a random output signal of a combinational mixer coupled to the linear feedback shift register.
21. The method of claim 16 , where receiving in a microcontroller data unique to the microcontroller further comprises:
programming a programmable register in the microcontroller with unique data previously read from a non-volatile register of the microcontroller; and
retrieving the unique data from the programmable register.