Trellis-coded modulation in a multi-level cell flash memory device
View Patent ↗A method and system for storing data in a multi-level cell (MLC) flash memory device are described. The method includes receiving data for storage in the flash memory device, the flash memory device comprising an array of MLC flash memory cells, and encoding the received data into non-binary symbols according to a trellis-coded modulation scheme. The method further includes writing each of the non-binary symbols to a respective flash memory cell set, wherein each flash memory cell set comprises a plurality of MLC flash memory cells.
1. A method for storing data in a multi-level cell (MLC) flash memory device, the method comprising:
receiving data for storage in the flash memory device, the flash memory device comprising an array of MLC flash memory cells;
encoding the received data into non-binary symbols according to a trellis-coded modulation scheme, the encoding including mapping a series of data bits encoded with a parity bit to a respective non-binary symbol using a mapping table;
accumulating one or more pages of non-binary symbols in a buffer; and
writing each of the non-binary symbols from the buffer to a respective flash memory cell set, wherein each flash memory cell set comprises a plurality of MLC flash memory cells.
2. The method according to claim 1 , wherein encoding the received data comprises:
generating an encoded data sequence from the received data; and
mapping the encoded data sequence to one of the non-binary symbols.
3. The method according to claim 2 , wherein the encoded data sequence is generated using convolutional encoding.
4. The method according to claim 2 , wherein the encoded data sequence is generated using trellis encoding.
5. The method according to claim 2 , wherein each MLC flash memory cell is an n-bit memory cell, where n>1, each flash memory cell set comprises m MLC flash memory cells, where m>1, and the encoded data sequence comprises n×m bits.
6. The method according to claim 2 , wherein each of the non-binary symbols includes a flash program level for each of the MLC flash memory cells in the respective flash memory cell sets.
7. The method according to claim 1 , further comprising block encoding the received data, wherein the block-encoded data is encoded into the non-binary symbols according to the trellis-coded modulation scheme.
8. The method according to claim 7 , wherein the block encoding comprises one of Reed-Solomon (RS) coding, Bose, Ray-Chaudhuri, Hocquenghem (BCH) coding, or low density parity check (LDPC) coding.
9. A non-transitory machine-readable medium containing machine-executable instructions which when executed by a machine perform a method for storing data in a multi-level (MLC) flash memory device, the method comprising:
receiving data for storage in the flash memory device, the flash memory device comprising an array of MLC flash memory cells;
encoding the received data into non-binary symbols according to a trellis-coded modulation scheme;
accumulating one or more pages of non-binary symbols in a buffer; and
writing each of the non-binary symbols from the buffer to a respective flash memory cell set, wherein each flash memory cell set comprises a plurality of MLC flash memory cells.
10. The non-transitory machine-readable medium according to claim 9 , wherein encoding the received data comprises:
generating an encoded data sequence from the received data; and
mapping the encoded data sequence to one of the non-binary symbols.
11. The non-transitory machine-readable medium according to claim 10 , wherein the encoded data sequence is generated using convolutional encoding.
12. The non-transitory machine-readable medium according to claim 10 , wherein the encoded data sequence is generated using trellis encoding.
13. The non-transitory machine-readable medium according to claim 10 , wherein each MLC flash memory cell is an n-bit memory cell, where n>1, each flash memory cell set comprises m MLC flash memory cells, where m>1, and the encoded data sequence comprises n×m bits.
14. The non-transitory machine-readable medium according to claim 10 , wherein each of the non-binary symbols includes a flash program level for each of the MLC flash memory cells in the respective flash memory cell sets.
15. The non-transitory machine-readable medium according to claim 9 , further comprising block encoding the received data, wherein the block-encoded data is encoded into the non-binary symbols according to the trellis-coded modulation scheme.
16. The non-transitory machine-readable medium according to claim 15 , wherein the block encoding comprises one of Reed-Solomon (RS) coding, Bose, Ray-Chaudhuri, Hocquenghem (BCH) coding, or low density parity check (LDPC) coding.
17. A multi-level cell (MLC) flash memory device, comprising:
a controller configured to receive data for storage in the flash memory device, the flash memory device comprising an array of MLC flash memory cells;
an encoder configured to encode the received data into non-binary symbols according to a trellis-coded modulation scheme; and
an array of MLC flash memory cells configured to store each of the non-binary symbols to a respective flash memory cell set in response to a write command received from the controller, wherein each flash memory cell set comprises a plurality of MLC flash memory cells; and
a buffer for accumulating the non-binary symbols before the non-binary symbols are sent to the array of MLC flash memory cells.
18. The MLC flash memory device according to claim 17 , wherein the encoder comprises:
an inside encoder configured to generate an encoded data sequence from the received data; and
a mapper configured to map the encoded data sequence to one of the non-binary symbols.
19. The MLC flash memory device according to claim 18 , wherein the inside encoder is a convolutional encoder.
20. The MLC flash memory device according to claim 18 , wherein the inside encoder is a trellis encoder.
21. The MLC flash memory device according to claim 18 , wherein each MLC flash memory cell is an n-bit memory cell, where n>1, each flash memory cell set comprises m MLC flash memory cells, where m>1, and the encoded data sequence comprises n×m bits.
22. The MLC flash memory device according to claim 18 , wherein each of the non-binary symbols includes a flash program level for each of the MLC flash memory cells in the respective flash memory cell sets.
23. The MLC flash memory device according to claim 17 , further comprising a block encoder configured to block encode the received data, wherein the encoder is configured to encode the block-encoded data into the non-binary symbols according to the trellis-coded modulation scheme.
24. The MLC flash memory device according to claim 23 , wherein the block encoder comprises a Reed-Solomon (RS) encoder, a Bose, Ray-Chaudhuri, Hocquenghem (BCH) encoder, or a low density parity check (LDPC) encoder.