IP Library Granted Patent US 8,587,120
Granted Patent B2
US 8,587,120 · App. 13/167,487 · Granted Nov 19, 2013

Semiconductor device and method of forming interconnect structure over seed layer on contact pad of semiconductor die without undercutting seed layer beneath interconnect structure

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Quick Facts
Patent No.
US 8,587,120
App. No.
13/167,487
Granted
Nov 19, 2013
Kind
B2
Abstract

A semiconductor device has a semiconductor die with a first conductive layer formed over the die. A first insulating layer is formed over the die with a first opening in the first insulating layer disposed over the first conductive layer. A second conductive layer is formed over the first insulating layer and into the first opening over the first conductive layer. An interconnect structure is constructed by forming a second insulating layer over the first insulating layer with a second opening having a width less than the first opening and depositing a conductive material into the second opening. The interconnect structure can be a conductive pillar or conductive pad. The interconnect structure has a width less than a width of the first opening. The second conductive layer over the first insulating layer outside the first opening is removed while leaving the second conductive layer under the interconnect structure.

Claims (64)

1. A method of making a semiconductor device, comprising:

providing a substrate;

forming a first conductive layer over the substrate;

forming a first insulating layer over the substrate including an opening in the first insulating layer disposed over the first conductive layer;

forming a second conductive layer over the first insulating layer and into the opening in the first insulating layer; and

forming a conductive pillar including a first region of the conductive pillar disposed within and terminating at the opening in the first insulating layer and extending outside a footprint of a second region of the conductive pillar disposed over the first region.

2. The method of claim 1 , further including forming a bump material over the conductive pillar.

3. The method of claim 1 , further including forming a second insulating layer over the substrate prior to forming the first conductive layer.

4. The method of claim 1 , wherein forming the conductive pillar includes:

forming a second insulating layer over the first insulating layer with an opening in the second insulating layer disposed over the first and second conductive layers, the opening in the second insulating layer including a width less than a width of the opening in the first insulating layer;

depositing a conductive material into the opening of the second insulating layer to form the conductive pillar; and

removing the second insulating layer to leave the conductive pillar with a width less than the width of the opening in the first insulating layer.

5. The method of claim 4 , further including forming the opening in the second insulating layer by laser direct ablation to expose the second conductive layer.

6. A method of making a semiconductor device, comprising:

providing a substrate;

forming a conductive layer over the substrate;

forming a first insulating layer over the substrate including an opening in the first insulating layer disposed over the conductive layer; and

forming an interconnect structure including a first region of the interconnect structure disposed within and terminating at the opening in the first insulating layer and extending outside a footprint of a second region of the interconnect structure disposed over the first region.

7. The method of claim 6 , wherein the interconnect structure includes a conductive pillar or conductive pad.

8. The method of claim 6 , further including forming a second insulating layer over the substrate prior to forming the conductive layer.

9. The method of claim 6 , wherein forming the interconnect structure includes:

forming a second insulating layer over the first insulating layer with an opening in the second insulating layer disposed over the opening in the first insulating layer, the opening in the second insulating layer including a width less than a width of the opening in the first insulating layer;

depositing a conductive material into the opening of the second insulating layer to form the interconnect structure; and

removing the second insulating layer to leave the interconnect structure with a width less than the width of the opening in the first insulating layer.

10. The method of claim 6 , wherein forming the interconnect structure includes:

forming a second insulating layer over the first insulating layer with an opening in the second insulating layer disposed over the opening in the first insulating layer, the opening in the second insulating layer including a width less than a width of the opening in the first insulating layer; and

depositing a first conductive material into the opening in the second insulating layer to form a first conductive pad.

11. The method of claim 7 , further including forming a bump material over the conductive pillar or conductive pad.

12. The method of claim 9 , further including forming the opening in the second insulating layer by laser direct ablation.

13. The method of claim 10 , wherein forming the interconnect structure further includes:

forming a masking layer over the first conductive material with an opening in the masking layer disposed over the first conductive pad, the opening in the masking layer including a width less than the width of the opening in the second insulating layer;

depositing a second conductive material into the opening in the masking layer to form a second conductive pad stacked over the first conductive pad;

removing the masking layer;

depositing a bump material over the first and second conductive pads; and

removing the second insulating layer to leave the interconnect structure.

14. A method of making a semiconductor device, comprising:

providing a substrate;

forming a first insulating layer over the substrate including an opening in the first insulating layer disposed over the substrate;

forming a first conductive layer over the first insulating layer and into the opening in the first insulating layer; and

forming an interconnect structure with a first portion of the interconnect structure disposed within the opening in the first insulating layer to a surface of the first insulating layer and a second portion of the interconnect structure disposed over the first portion of the interconnect structure including a width less than the opening in the first insulating layer.

15. The method of claim 14 , further including removing a portion of the first conductive layer over the first insulating layer outside the opening in the first insulating layer.

16. The method of claim 14 , further including forming a second conductive layer over the substrate prior to forming the first insulating layer, the opening in the first insulating layer being disposed over the second conductive layer.

17. The method of claim 14 , wherein the interconnect structure includes a conductive pillar or conductive pad.

18. The method of claim 14 , wherein forming the interconnect structure includes:

forming a second insulating layer over the first insulating layer with an opening in the second insulating layer disposed over the first conductive layer, the opening in the second insulating layer including a width less than a width of the opening in the first insulating layer;

depositing a conductive material into the opening in the second insulating layer to form the interconnect structure; and

removing the second insulating layer to leave the interconnect structure with the width less than the width of the opening in the first insulating layer.

19. The method of claim 14 , wherein forming the interconnect structure includes:

forming a second insulating layer over the first insulating layer with an opening in the second insulating layer disposed over the first conductive layer, the opening in the second insulating layer including a width less than a width of the opening in the first insulating layer; and

depositing a first conductive material into the opening in of the second insulating layer to form a first conductive pad.

20. The method of claim 19 , wherein forming the interconnect structure further includes:

forming a masking layer over the first conductive material with an opening in the masking layer disposed over the first conductive pad, the opening in the masking layer including a width less than the width of the opening in the second insulating layer;

depositing a second conductive material into the opening in the masking layer to form a second conductive pad stacked over the first conductive pad;

removing the masking layer;

depositing a bump material over the first and second conductive pads; and

removing the second insulating layer to leave the interconnect structure with the width less than the width of the opening in the first insulating layer.

21. A method of making a semiconductor device, comprising:

providing a substrate including a first insulating layer disposed over a surface of the substrate;

forming a first conductive layer in an opening of the first insulating layer; and

forming an interconnect structure including a first region of the interconnect structure disposed within and terminating at the opening of the first insulating layer to extend outside a footprint of a second region of the interconnect structure disposed over the first region.

22. The method of claim 21 , further including forming a second insulating layer over the first insulating layer.

23. The method of claim 21 , further including forming a second conductive layer over the substrate prior to forming the first insulating layer.

24. The method of claim 21 , wherein the interconnect structure includes a conductive pillar or conductive pad.

25. The method of claim 21 , further including forming a bump material over the interconnect structure.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE>" TO "STATS CHIPPAC PTE. LTD" PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0219. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 1, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064803/0300 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2019
From: STATS CHIPPAC PTE. LTD.
To: JCET SEMICONDUCTOR (SHAOXING) CO., LTD.
Reel/Frame 051365/0680 →
RELEASE OF SECURITY INTEREST Recorded Dec 13, 2019
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 051285/0318 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0219 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →