Integrated circuit packaging system with dual side mold and method of manufacture thereof
View Patent ↗A method of manufacture of an integrated circuit packaging system includes: providing a substrate; mounting a top integrated circuit on a first side of the substrate; mounting a bottom integrated circuit on a second side of the substrate; forming a top encapsulation over the top integrated circuit and a bottom encapsulation over the bottom integrated circuit simultaneously; and forming a bottom via through the bottom encapsulation to the substrate.
1. A method of manufacture of an integrated circuit packaging system comprising:
providing a substrate;
mounting a top integrated circuit on a first side of the substrate;
mounting a bottom integrated circuit on a second side of the substrate, wherein the second side is opposite the first side;
forming a top encapsulation over the top integrated circuit and a bottom encapsulation over the bottom integrated circuit simultaneously; and
forming a bottom via through the bottom encapsulation to the substrate.
2. The method as claimed in claim 1 further comprising forming a first via through the bottom encapsulation to the bottom integrated circuit.
3. The method as claimed in claim 1 further comprising forming a second via through the top encapsulation to the top integrated circuit.
4. The method as claimed in claim 1 further comprising forming a top redistribution layer at a surface of the top integrated circuit.
5. The method as claimed in claim 1 wherein mounting the top integrated circuit includes mounting the top integrated circuit with a top interconnect between the top integrated circuit and the substrate.
6. A method of manufacture of an integrated circuit packaging system comprising:
providing a substrate;
mounting a top integrated circuit on a first side of the substrate;
mounting a bottom integrated circuit on a second side of the substrate;
forming a top encapsulation over the top integrated circuit and a bottom encapsulation over the bottom integrated circuit simultaneously; and
forming a bottom via through the bottom encapsulation to the substrate, the bottom via having a truncated conic shape.
7. The method as claimed in claim 6 further comprising mounting an upper stacked integrated circuit attached to the top integrated circuit.
8. The method as claimed in claim 6 further comprising mounting a substrate interconnect on the substrate spaced apart from the bottom encapsulation.
9. The method as claimed in claim 6 further comprising forming a bottom redistribution layer at a surface of the bottom encapsulation facing away from the substrate.
10. The method as claimed in claim 6 wherein forming the bottom via includes forming a bottom hole of the bottom encapsulation with a laser.
11. An integrated circuit packaging system comprising:
a substrate;
a top integrated circuit mounted on the substrate;
a bottom integrated circuit mounted on an opposite side of the substrate from the top integrated circuit;
a top encapsulation over the top integrated circuit;
a bottom encapsulation over the bottom integrated circuit having characteristics of having been formed simultaneously with the top encapsulation; and
a bottom via through the bottom encapsulation to the substrate.
12. The integrated circuit packaging system as claimed in claim 11 further comprising a first via through the bottom encapsulation to the bottom integrated circuit.
13. The integrated circuit packaging system as claimed in claim 11 further comprising a second via through the top encapsulation to the top integrated circuit.
14. The integrated circuit packaging system as claimed in claim 11 wherein the top integrated circuit includes a top redistribution layer.
15. The integrated circuit packaging system as claimed in claim 11 further comprising a top interconnects between the top integrated circuit and the substrate.
16. The integrated circuit packaging system as claimed in claim 11 wherein the bottom via has a truncated conic shape.
17. The integrated circuit packaging system as claimed in claim 16 further comprising an upper stacked integrated circuit attached to the top integrated circuit.
18. The integrated circuit packaging system as claimed in claim 16 further comprising a substrate interconnect on the substrate spaced apart from the bottom encapsulation.
19. The integrated circuit packaging system as claimed in claim 16 further comprising a bottom redistribution layer at a surface of the bottom encapsulation facing away from the substrate.
20. The integrated circuit packaging system as claimed in claim 16 wherein the bottom encapsulation includes characteristics of having been formed with a laser, including burn mark bordering the bottom via.