Granted Patent B2

US 8,610,286 · App. 13/315,010 · Granted Dec 17, 2013

Abstract

Claims (58)

1. A method of making a semiconductor device, comprising:

providing a semiconductor die;

depositing an encapsulant over the semiconductor die;

forming a plurality of channels in the encapsulant;

forming an interconnect structure over the semiconductor die and encapsulant; and

removing a first portion of the encapsulant to completely remove the channels after forming the interconnect structure and to reduce a thickness of the semiconductor device.

2. The method of claim 1 , wherein a thickness of the encapsulant provides sufficient stiffness to reduce warpage while the channels provide stress relief during formation of the interconnect structure.

3. The method of claim 1 , further including forming the channels in perpendicular directions.

4. The method of claim 1 , wherein forming the channels includes removing a second portion of the encapsulant.

5. The method of claim 1 , wherein forming the channels includes:

depositing the encapsulant over the semiconductor die;

providing a chase mold including a plurality of extended surfaces;

placing the semiconductor die and encapsulant in the chase mold; and

forming the encapsulant around the extended surfaces to form the channels in the encapsulant.

6. The method of claim 1 , further including disposing a stiffening support member around the semiconductor die prior to depositing the encapsulant.

7. A method of making a semiconductor device, comprising:

providing a semiconductor die;

depositing an encapsulant over the semiconductor die;

forming a recess in a surface of the encapsulant;

forming an interconnect structure over the semiconductor die and encapsulant; and

removing a first portion of the encapsulant from the surface of the encapsulant and a first portion of the recess after forming the interconnect structure to reduce a thickness of the semiconductor device.

8. The method of claim 7 , wherein a thickness of the encapsulant provides sufficient stiffness to reduce warpage while the recess provides stress relief during formation of the interconnect structure.

9. The method of claim 7 , further including forming a plurality of recesses in the encapsulant.

10. The method of claim 9 , further including forming the recesses in perpendicular directions.

11. The method of claim 7 , wherein forming the recess includes removing a second portion of the encapsulant.

12. The method of claim 7 , wherein forming the recess includes:

depositing the encapsulant over the semiconductor die;

providing a chase mold including an extended surface;

placing the semiconductor die and encapsulant in the chase mold; and

forming the encapsulant around the extended surface to form the recess in the encapsulant.

13. The method of claim 7 , further including disposing a stiffening support member around the semiconductor die.

14. A method of making a semiconductor device, comprising:

providing a semiconductor die;

depositing a first encapsulant over the semiconductor die with a recess in the first encapsulant;

depositing a second encapsulant over the first encapsulant and into the recess of the first encapsulant;

forming an interconnect structure over the semiconductor die and first encapsulant; and

removing a portion of the second encapsulant after forming the interconnect structure to reduce thickness of the semiconductor device.

15. The method of claim 14 , wherein a thickness of the first encapsulant provides sufficient stiffness to reduce warpage while the second encapsulant provide stress relief during formation of the interconnect structure.

16. The method of claim 14 , further including removing a portion of the first encapsulant after forming the interconnect structure to reduce thickness of the semiconductor device.

17. The method of claim 14 , wherein depositing the first encapsulant includes:

depositing the first encapsulant over the semiconductor die;

providing a chase mold including an extended surface;

placing the semiconductor die and first encapsulant in the chase mold; and

forming the first encapsulant around the extended surface to form the recess in the first encapsulant.

18. The method of claim 14 , wherein depositing the second encapsulant includes:

depositing the second encapsulant over the first encapsulant;

providing a chase mold; and

placing the semiconductor die and first encapsulant in the chase mold.

19. The method of claim 14 , further including disposing a stiffening support member around the semiconductor die.

20. The method of claim 14 , wherein the first encapsulant has a first coefficient of thermal expansion different and the second encapsulant has a second coefficient of thermal expansion different than the first coefficient of thermal expansion.

21. A semiconductor device, comprising:

a semiconductor die;

an encapsulant deposited over the semiconductor die, wherein a recess is formed in the encapsulant over a footprint of the semiconductor die; and

an interconnect structure formed over the semiconductor die and encapsulant, wherein a portion of the encapsulant and recess are removed to reduce thickness of the semiconductor device.

22. The semiconductor device of claim 21 , wherein a thickness of the encapsulant provides sufficient stiffness to reduce warpage while the recess provide stress relief during formation of the interconnect structure.

23. The semiconductor device of claim 21 , further including a plurality of recesses in the encapsulant.

24. The semiconductor device of claim 23 , wherein the recesses are formed in perpendicular directions.

25. The semiconductor device of claim 21 , further including a stiffening support member disposed around the semiconductor die.

Assignments (6)