IP Library Granted Patent US 8,780,639
Granted Patent B2
US 8,780,639 · App. 13/466,878 · Granted Jul 15, 2014

Non-volatile memory device with plural reference cells, and method of setting the reference cells

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Quick Facts
Patent No.
US 8,780,639
App. No.
13/466,878
Granted
Jul 15, 2014
Kind
B2
Abstract

A non-volatile memory device has an array of non-volatile memory cells, a first plurality of non-volatile memory reference cells, with each reference cell capable of being programmed to a reference level different from the other reference cells; and a second plurality of comparators. Each of the comparators is connectable to one of the first plurality of non-volatile memory reference cells and to one of a third plurality of memory cells from among the array of non-volatile memory cells.

Claims (28)

1. A method of programming a first plurality of reference cells in a memory device having an array of non-volatile memory cells and a second plurality of comparators comprising:

(i) programming one of said first plurality of reference cells;

(ii) measuring the read signal of the programmed reference cell;

(iii) comparing the read signal of the programmed reference cell measured to a first pre-determined value;

(iv) continuing the programming of said first plurality of reference cells based upon said comparison;

(v) programming a third plurality of non-volatile memory cells, wherein said third plurality is associated with one of said second plurality of comparators;

(vi) reading said third plurality of non-volatile memory cells programmed using one of said second plurality of comparators;

(vii) continuing the programming of the third plurality of non-volatile memory cells based upon said reading;

(viii) measuring the read signals of the third plurality of non-volatile memory cells;

(ix) calculating the median value of the read signals from the third plurality of non-volatile memory cells measured;

(x) continuing the programming of said one of said first plurality of reference cells;

(xi) measuring the read signal of the programmed reference cell;

(xii) comparing the read signal of the programmed reference cell measured to a second pre-determined value; and

(xiii) continuing the programming of said first plurality of reference cells based upon said comparison.

2. The method of claim 1 further comprising:

repeating the steps of (i)-(x) for a different one of said first plurality of reference cells.

3. The method of claim 1 wherein said continuing of programming is done by adjusting program conditions so as to maintain a substantially constant rate of electron injection.

4. The method of claim 1 further comprising:

wherein the programming step (i) programs said first plurality of reference cells in parallel;

wherein the measuring step (ii) measures the read signal of each of the programmed first plurality of reference cells

wherein the comparing step (iii) compares the measured read signal of each of the programmed first plurality of reference cells using a different one of the second plurality of comparators, wherein a different one of said second plurality of comparators is associated with each one of said programmed first plurality of reference cells;

wherein the method further comprising: deselecting the reference cells among the first plurality of reference cells which have passed verification;

wherein the continuing step (iv) continues the programming of the first plurality of reference cells which have not been deselected;

wherein the reading step (vi) reads each of said third plurality of non-volatile memory cells using a different one of said second plurality of comparators;

wherein the calculating step (ix) calculates the median value of the signals from the measured signals of the third non-volatile memory cells associated with a different one for each of said first plurality of reference cells;

wherein said method further comprising: deselecting reference cells from said first plurality of reference cells based upon said calculation after step (ix);

wherein the continuing step (x) continues the programming of references cells from the first plurality of reference cells which have not been deselected.

5. The method of claim 1 , wherein each reference cell from the first plurality of reference cells has an associated different comparator from the second plurality of comparators.

Assignments (14)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: SILICON STORAGE TECHNOLOGY, INC.
Reel/Frame 059687/0344 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: SILICON STORAGE TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041675/0316 →