Resistance-switching memory cells adapted for use at low voltage
View Patent ↗A memory cell is provided that includes a diode and a resistance-switching material layer coupled in series with the diode. The resistance-switching material layer: (a) includes a material from the family consisting of XvOw, wherein X represents an element from the family consisting of Hf and Zr, and wherein the subscripts v and w have non-zero values that form a stable compound, and (b) has a thickness between 20 and 65 angstroms. Other aspects are also provided.
1. A memory cell comprising:
a diode; and
a resistance-switching material layer coupled in series with the diode, wherein the resistance-switching material layer: (a) comprises a material from the family consisting of X v O w , wherein X represents an element from the family consisting of Hf and Zr, and wherein the subscripts v and w have non-zero values that form a stable compound, and (b) has a thickness between 20 and 65 angstroms.
2. The memory cell of claim 1 , wherein the diode comprises a band gap smaller than 1.12 electron volts.
3. The memory cell of claim 1 , wherein the diode comprises one or more of germanium (Ge) and a silicon germanium alloy (Si x Ge 1-x ).
4. The memory cell of claim 1 , wherein the resistance-switching material layer comprises HfO 2 or ZrO 2 .
5. The memory cell of claim 1 , wherein the memory cell is adapted to be programmed with a voltage less than about 5 volts.
6. The memory cell of claim 1 , wherein the diode is adapted to be read using a bias voltage less than about 2 volts.
7. The memory cell of claim 1 , wherein the memory cell comprises a monolithic 3-dimensional array.
8. A memory cell comprising:
a diode comprising a semiconductor material with a band gap smaller than that of silicon; and
a resistance-switching material layer coupled in series with the diode, wherein the resistance-switching material layer: (a) comprises a material from the family consisting of X v O w , wherein X represents an element from the family consisting of Hf and Zr, and wherein the subscripts v and w have non-zero values that form a stable compound, and (b) has a thickness between 20 and 65 angstroms.
9. The memory cell of claim 8 , wherein the band gap is smaller than 1.12 electron volts.
10. The memory cell of claim 8 , wherein the diode comprises one or more of germanium (Ge) and a silicon germanium alloy (Si x Ge 1-x ).
11. The memory cell of claim 8 , wherein the resistance-switching material layer comprises HfO 2 or ZrO 2 .
12. The memory cell of claim 8 , wherein the memory cell is adapted to be programmed with a voltage less than about 5 volts.
13. The memory cell of claim 8 , wherein the diode is adapted to be read using a bias voltage less than about 2 volts.
14. The memory cell of claim 8 , wherein the memory cell comprises a monolithic 3-dimensional array.
15. A memory cell comprising:
a diode comprising a semiconductor material with a band gap smaller than that of silicon; and
a dielectric material layer coupled in series with the diode, wherein the dielectric material layer: (a) comprises a material from the family consisting of X v O w , wherein X represents an element from the family consisting of Hf and Zr, and wherein the subscripts v and w have non-zero values that form a stable compound, and
(b) has a thickness between 20 and 65 angstroms.
16. The memory cell of claim 15 , wherein the diode comprises one or more of germanium (Ge) and a silicon germanium alloy (Si x Ge 1-x ).
17. The memory cell of claim 15 , wherein
the dielectric material layer comprises HfO 2 or ZrO 2 .
18. The memory cell of claim 15 , wherein the memory cell is adapted to be programmed with a voltage less than about 5 volts.
19. The memory cell of claim 15 , wherein the diode is adapted to be read using a bias voltage less than about 2 volts.
20. The memory cell of claim 15 , wherein the memory cell comprises a monolithic 3-dimensional array.