Semiconductor device and method of forming WLCSP with semiconductor die embedded within interconnect structure
View Patent ↗A semiconductor device includes a semiconductor die. An encapsulant is deposited over the semiconductor die. An insulating layer is formed over the encapsulant and a first surface of the semiconductor die. A semiconductor component is disposed over the insulating layer and first surface of the semiconductor die. A first interconnect structure is formed over the encapsulant and first surface of the semiconductor die to embed the semiconductor component. A conductive via is formed in the semiconductor die. A heat sink is formed over the semiconductor die. A second interconnect structure is formed over a second surface of the semiconductor die opposite the first surface. A conductive layer is formed over the semiconductor component. An opening is formed in the insulating layer.
1. A semiconductor device, comprising:
a first semiconductor die;
a first conductive via formed in the first semiconductor die;
an encapsulant deposited around the first semiconductor die;
a first insulating layer formed on the first semiconductor die and a surface of the encapsulant and including an opening extending from a surface of the first insulating layer to a first contact pad on an active surface of the first semiconductor die;
a second insulating layer formed over the first insulating layer;
a second semiconductor die embedded in the second insulating layer and including an active surface oriented toward the active surface of the first semiconductor die;
a conductive layer formed through the second insulating layer outside a footprint of the second semiconductor die and extending to a second contact pad on the active surface of the first semiconductor die; and
a bump disposed in the opening of the first insulating layer.
2. The semiconductor device of claim 1 , further including a second conductive via formed in the encapsulant.
3. The semiconductor device of claim 1 , further including a second conductive via formed in the second semiconductor die.
4. The semiconductor device of claim 1 , further including an interconnect structure formed over a surface of the first semiconductor die opposite the first insulating layer.
5. The semiconductor device of claim 1 , further including a semiconductor component disposed over the first semiconductor die opposite the first insulating layer.
6. A semiconductor device, comprising:
a first semiconductor die;
a first conductive via formed through the first or second semiconductor die;
an encapsulant deposited around the semiconductor die;
a first insulating layer formed on the first semiconductor die and encapsulant and including an opening extending to a first contact pad on an active surface of the first semiconductor die;
a first interconnect structure formed over the first insulating layer and including a conductive layer extending to a second contact pad on the active surface of the first semiconductor die;
a second semiconductor die embedded in the first interconnect structure; and
a bump disposed in the opening in the first insulating layer.
7. The semiconductor device of claim 6 , further including a second interconnect structure formed over the first semiconductor die opposite the first insulating layer.
8. The semiconductor device of claim 6 , wherein the first interconnect structure further includes a second insulating layer.
9. A semiconductor device, comprising:
a first semiconductor die;
a first conductive via formed in the first semiconductor die;
a first insulating layer formed over the first semiconductor die and including an opening extending to a first contact pad on an active surface of the first semiconductor die;
a second insulating layer formed over the first semiconductor die;
a second semiconductor die embedded in the second insulating layer;
a conductive layer formed through the second insulating layer and extending to a second contact pad on the active surface of the first semiconductor die; and
a bump disposed in the opening in the first insulating layer.
10. The semiconductor device of claim 9 , further including a heat sink disposed over the first semiconductor die.
11. The semiconductor device of claim 9 , further including an interconnect structure formed over the second insulating layer.
12. The semiconductor device of claim 9 , further including an encapsulant deposited around the first semiconductor die.
13. The semiconductor device of claim 12 , wherein the first insulating layer is formed over a surface of the encapsulant.
14. The semiconductor device of claim 12 , further including a second conductive via formed in the encapsulant.
15. The semiconductor device of claim 6 , wherein an active surface of the second semiconductor die is oriented toward the active surface of the first semiconductor die.