Granted Patent B2

US 9,093,161 · App. 13/830,207 · Granted Jul 28, 2015

Abstract

Claims (13)

1. A programming circuit for use in a memory device, comprising:

a first bit line coupled to an array of memory cells and to a first switch and second switch, and a second bit line coupled to the array of memory cells and to a third switch and a fourth switch, wherein the first switch and third switch are coupled to a first current mirror and the second switch and fourth switch are coupled to a second current mirror; and

a controller configured to turn on the first switch and fourth switch during a first time interval and to turn on the second switch and third switch during a second time interval, wherein values are programmed into at least some of the memory cells using the first bit line and the second bit line during a third time interval that spans the first time interval and the second time interval.

2. The circuit of claim 1 , wherein the memory cells are flash memory cells.

3. The circuit of claim 1 , wherein the first time interval and second time interval are equal in duration.

4. A method of programming a memory device, comprising:

during a first time interval, connecting a first bit line to a first current mirror through a first switch and connecting a second bit line to a second current mirror through a second switch;

during a second time interval, connecting the first bit line to the second current mirror through a third switch and connecting the second bit line to the first current mirror through a fourth switch;

programming values into a plurality of memory cells associated with the first bit line and a plurality of memory cells associated with the second bit line during the first time interval and second time interval.

5. The method of claim 4 , wherein the memory cells are flash memory cells.

6. The method of claim 4 , wherein the first time interval and second time interval are equal in duration.

7. The circuit of claim 1 , wherein the first time interval and the second time interval partially overlap.

8. The method of claim 4 , wherein the first time interval and the second time interval partially overlap.

Assignments (15)