Granted Patent B2

US 8,681,552 · App. 13/873,183 · Granted Mar 25, 2014

Abstract

Claims (41)

1. A method comprising:

receiving a data block comprising a first plurality of data portions;

storing the data block in a data buffer;

identifying a plurality of storage blocks interleaved among a plurality of flash storage devices; and

initiating a plurality of data transfers for writing the data portions of the data block asynchronously into the plurality of storage blocks, wherein the data transfers for writing the data portions of the data block asynchronously into the plurality of storage blocks comprise:

reading the data portions of the data block from the data buffer serially; and

writing the data portions of the data block into the plurality of storage blocks in parallel.

2. The method of claim 1 , wherein the first plurality of data portions is received from a host serially.

3. The method of claim 1 , wherein each of the data portions comprises an address of a sequence of addresses, and

wherein receiving the first plurality of data portions serially comprises receiving the first plurality of data portions in sequential order according to the sequence of addresses.

4. The method of claim 1 , further comprising erasing the plurality of storage blocks after receiving the data block.

5. The method of claim 4 , wherein erasing the plurality of storage blocks comprises erasing the plurality of storage blocks in parallel before initiating the plurality of data transfers for writing the data portions of the data block asynchronously into the plurality of storage blocks.

6. The method of claim 1 , wherein receiving the data block further comprises reading a data portion of the data block from a storage block of the plurality of storage blocks, and

wherein the plurality of data transfers further comprises a data transfer for writing the data block read from the storage block into the plurality of storage blocks.

7. The method of claim 6 , wherein the first plurality of data portions is received from a host serially.

8. The method of claim 6 , further comprising erasing the plurality of storage blocks after receiving the data block.

9. The method of claim 1 , wherein receiving the data block further comprises:

initiating a plurality of data transfers for reading a second plurality of data portions of the data block asynchronously from the plurality of storage blocks; and

writing the second plurality of data portions into the data buffer in parallel,

wherein the plurality of data transfers further comprises a plurality of data transfers for writing the second plurality of data portions of the data block asynchronously into the plurality of storage blocks.

10. The method of claim 9 , further comprising erasing the plurality of storage blocks after receiving the data block.

11. A system comprising:

a data buffer configured to receive and store a data block comprising a first plurality of data portions;

a plurality of flash storage devices comprising a plurality of storage blocks interleaved among the flash storage devices; and

a controller coupled to the data buffer and the plurality of flash storage devices, the controller configured to initiate a plurality of data transfers for writing the data portions of the data block asynchronously into the plurality of storage blocks, wherein the data transfers for writing the data portions of the data block asynchronously into the plurality of storage blocks, the controller configured to:

read the data portions of the data block from the data buffer serially; and

write the data portions of the data block into the plurality of storage blocks in parallel.

12. The system of claim 11 , wherein the data buffer is configured to receive the first plurality of data portions from a host serially.

13. The system of claim 11 , wherein each of the data portions comprises an address of a sequence of addresses, and

wherein the data buffer is configured to receive the first plurality of data portions in sequential order according to the sequence of addresses.

14. The system of claim 11 , wherein the controller is further configured to erase the plurality of storage blocks after the data block is received by the data buffer.

15. The system of claim 14 , wherein the controller is further configured to erase the plurality of data blocks in parallel before initiating the plurality of data transfers for writing the data portions of the data block asynchronously into the plurality of storage blocks.

16. The system of claim 11 , wherein the controller is further configured to read a data portion of the data block from a storage block of the plurality of storage blocks, and

wherein the plurality of data transfers comprises a data transfer from writing the data block read from the storage block into the plurality of storage blocks.

17. The system of claim 16 , wherein the data buffer is configured to receive the first plurality of data portions from a host serially.

18. The system of claim 16 , wherein the controller is further configured to erase the plurality of data blocks after the data block is received by the data buffer.

19. The system of claim 11 , wherein the controller is further configured to:

initiate a second plurality of data transfers for reading a second plurality of data portions of the data block asynchronously from the plurality of storage blocks; and

write the second plurality of data portions into the data buffer in parallel,

wherein the plurality of data transfers for writing the data portions of the data block into the plurality of storage blocks further comprises a plurality of data transfers from writing the data second plurality of data portions of the data block asynchronously into the plurality of storage blocks.

20. The system of claim 11 , further comprising a plurality of direct memory access units configured to transfer data portions between the data buffer and the plurality of storage blocks in the plurality of flash storage devices.

Assignments (11)