Split gate non-volatile flash memory cell having a silicon-metal floating gate and method of making same
A non-volatile memory cell includes a substrate of a first conductivity type with first and second spaced apart regions of a second conductivity type, forming a channel region therebetween. A select gate is insulated from and disposed over a first portion of the channel region which is adjacent to the first region. A floating gate is insulated from and disposed over a second portion of the channel region which is adjacent the second region. Metal material is formed in contact with the floating gate. A control gate is insulated from and disposed over the floating gate. An erase gate includes a first portion insulated from and disposed over the second region and is insulated from and disposed laterally adjacent to the floating gate, and a second portion insulated from and laterally adjacent to the control gate and partially extends over and vertically overlaps the floating gate.
1. A non-volatile memory cell comprising:
a substrate of a first conductivity type, having a first region of a second conductivity type, a second region of the second conductivity type spaced apart from the first region, forming a channel region therebetween;
a select gate insulated from and disposed over a first portion of the channel region which is adjacent to the first region;
a floating gate insulated from and disposed over a second portion of the channel region which is adjacent the second region, wherein the floating gate is formed of polysilicon;
metal material formed in contact with the floating gate;
a control gate insulated from and disposed over the floating gate;
an erase gate that includes first and second portions, wherein:
the first portion is insulated from and disposed over the second region, and is insulated from and disposed laterally adjacent to the floating gate; and
the second portion is insulated from and laterally adjacent to the control gate, and partially extends over and vertically overlaps the floating gate;
wherein the metal material is disposed as a layer on a top surface of the floating gate, and wherein the layer of the metal material extends over only a portion of the top surface of the floating gate, wherein the layer of the metal material does not extend over any portion of the top surface over which the erase gate second portion extends.
2. A method of forming a non-volatile memory cell comprising:
forming, in a substrate of a first conductivity type, spaced apart first and second regions of a second conductivity type, defining a channel region therebetween;
forming a select gate insulated from and disposed over a first portion of the channel region which is adjacent to the first region;
forming a floating gate of polysilicon material insulated from and disposed over a second portion of the channel region which is adjacent the second region;
forming metal material in contact with the floating gate;
forming a control gate insulated from and disposed over the floating gate;
forming an erase gate that includes first and second portions, wherein:
the first portion is insulated from and disposed over the second region, and is insulated from and disposed laterally adjacent to the floating gate; and
the second portion is insulated from and laterally adjacent to the control gate, and partially extends over and vertically overlaps the floating gate;
wherein the metal material is disposed as a layer on a top surface of the floating gate, and wherein the layer of the metal material extends over only a portion of the top surface of the floating gate, wherein the layer of the metal material does not extend over any portion of the top surface over which the erase gate second portion extends.