Semiconductor device and method of forming interconnect structure with conductive pads having expanded interconnect surface area for enhanced interconnection properties
View Patent ↗A semiconductor device has a substrate and first conductive pads formed over the substrate. An interconnect surface area of the first conductive pads is expanded by forming a plurality of recesses into the first conductive pads. The recesses can be an arrangement of concentric rings, arrangement of circular recesses, or arrangement of parallel linear trenches. Alternatively, the interconnect surface area of the first conductive pads is expanded by forming a second conductive pad over the first conductive pad. A semiconductor die has a plurality of interconnect structures formed over a surface of the semiconductor die. The semiconductor die is mounted to the substrate with the interconnect structures contacting the expanded interconnect surface area of the first conductive pads to increase bonding strength of the interconnect structure to the first conductive pads. A mold underfill material is deposited between the semiconductor die and substrate.
1. A method of making a semiconductor device, comprising:
providing a substrate;
forming a conductive layer over the substrate;
forming a first insulating layer over the substrate including forming a first portion of the first insulating layer over the conductive layer;
forming a first conductive pad over the first portion of the first insulating layer and the conductive layer to form an interconnect surface area, the first conductive pad including an outer sidewall;
expanding the interconnect surface area by removing a first portion of the first conductive pad to form a plurality of recesses in the first conductive pad, a first recess of the plurality of recesses forming a circular ring directly overlying the first portion of the first insulating layer and the conductive layer; and
bonding a semiconductor die to the substrate by bonding an interconnect structure of the semiconductor die into the expanded interconnect surface area and contacting the outer sidewall of the first conductive pad.
2. The method of claim 1 , further including forming the plurality of recesses partially into the first conductive pad while retaining a second portion of the first conductive pad under the recesses.
3. The method of claim 2 , further including:
forming a second insulating layer with patterned openings disposed over the first conductive pad; and
forming the recesses through a surface of the first conductive pad within the patterned openings of the second insulating layer.
4. A method of making a semiconductor device, comprising:
providing a substrate;
forming a first conductive layer over the substrate;
forming a first insulating layer over the substrate including forming a first portion of the first insulating layer over the first conductive layer;
forming a first conductive pad over the first conductive layer to form an interconnect surface area including an outer sidewall of the first conductive pad;
expanding the interconnect surface area of the first conductive pad overlying the first portion of the first insulating layer and first conductive layer; and
bonding an interconnect structure of a semiconductor die to the expanded interconnect surface area and the outer sidewall of the first conductive pad.
5. The method of claim 4 , further including expanding the interconnect surface area over the first conductive pad by forming a second conductive pad over the first conductive pad.
6. The method of claim 5 , wherein the second conductive pad includes a ring shape.
7. The method of claim 4 , further including depositing a mold underfill material around the interconnect structure and over the substrate.
8. The method of claim 4 , further including:
forming a second conductive layer over the first conductive layer; and
forming the first conductive pad over the second conductive layer.
9. A method of making a semiconductor device, comprising:
providing a substrate;
forming a first insulating layer over the substrate;
forming a first conductive pad over the first insulating layer;
expanding an interconnect surface area of the first conductive pad, the expanded interconnect surface area directly overlying the first insulating layer; and
bonding an interconnect structure of a semiconductor die to the expanded interconnect surface area and an outer sidewall of the first conductive pad.
10. The method of claim 9 , further including forming a plurality of recesses partially into the first conductive pad while retaining a portion of the first conductive pad under the recesses.
11. The method of claim 10 , further including:
forming a second insulating layer with patterned openings disposed over the first conductive pad; and
forming the recesses through a surface of the first conductive pad within the patterned openings of the second insulating layer.
12. The method of claim 11 , wherein the patterned openings include ring openings, circular openings, or linear openings.
13. The method of claim 9 , further including forming a second conductive pad over the first conductive pad.
14. The method of claim 13 , wherein the second conductive pad includes a circular shape or ring shape.
15. The method of claim 9 , wherein the interconnect structure includes a bump.
16. The method of claim 9 , further including depositing a mold underfill material between the semiconductor die and substrate.
17. A semiconductor device, comprising:
a substrate;
a conductive layer formed over the substrate;
an insulating layer formed over the substrate and the conductive layer;
a first conductive pad formed over the conductive layer and including an expanded interconnect surface area overlying the insulating layer;
a semiconductor die disposed over the first conductive pad; and
an interconnect structure disposed between the semiconductor die and the first conductive pad, the interconnect structure bonded to the expanded interconnect surface area and an outer sidewall of the first conductive pad.
18. The semiconductor device of claim 17 , wherein the expanded interconnect surface area of the first conductive pad includes a plurality of recesses formed partially into the first conductive pad with a portion of the first conductive pad disposed under the recesses.
19. The semiconductor device of claim 18 , wherein the recesses include a ring shape or linear shape.
20. The semiconductor device of claim 17 , wherein the expanded interconnect surface area includes a second conductive pad formed over the first conductive pad.
21. The semiconductor device of claim 17 , wherein the interconnect structure includes a bump.
22. The semiconductor device of claim 17 , further including depositing a mold underfill material between the semiconductor die and substrate.
23. The method of claim 4 , further including:
forming a second insulating layer over the first insulating layer;
forming the first conductive pad in an opening in the second insulating layer; and
removing the second insulating layer to expose the outer sidewall of the first conductive pad.
24. The method of claim 9 , further including:
forming a second insulating layer over the first insulating layer;
forming the first conductive pad in an opening in the second insulating layer; and
removing the second insulating layer to expose the outer sidewall of the first conductive pad.
25. The method of claim 10 , wherein a first recess of the plurality of recesses forms a circular ring.
26. The semiconductor device of claim 18 , wherein a first recess of the plurality of recesses forms a circular ring.