IP Library Granted Patent US 9,257,411
Granted Patent B2
US 9,257,411 · App. 14/265,782 · Granted Feb 9, 2016

Semiconductor device and method of embedding bumps formed on semiconductor die into penetrable adhesive layer to reduce die shifting during encapsulation

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,257,411
App. No.
14/265,782
Granted
Feb 9, 2016
Kind
B2
Abstract

A semiconductor device has a semiconductor die with a plurality of bumps formed over a surface of the first semiconductor die. A penetrable adhesive layer is formed over a temporary carrier. The adhesive layer can include a plurality of slots. The semiconductor die is mounted to the carrier by embedding the bumps into the penetrable adhesive layer. The semiconductor die and interconnect structure can be separated by a gap. An encapsulant is deposited over the first semiconductor die. The bumps embedded into the penetrable adhesive layer reduce shifting of the first semiconductor die while depositing the encapsulant. The carrier is removed. An interconnect structure is formed over the semiconductor die. The interconnect structure is electrically connected to the bumps. A thermally conductive bump is formed over the semiconductor die, and a heat sink is mounted to the interconnect structure and thermally connected to the thermally conductive bump.

Claims (35)

1. A method of making a semiconductor device, comprising:

providing a first semiconductor die including a plurality of bumps formed over a surface of the first semiconductor die;

completely embedding the bumps within a penetrable adhesive layer to displace the penetrable adhesive layer and reduce shifting of the first semiconductor die; and

depositing an encapsulant over the first semiconductor die.

2. The method of claim 1 , further including forming a plurality of electrically isolated bumps over the surface of the first semiconductor die.

3. The method of claim 1 , further including forming an interconnect structure over the first semiconductor die.

4. The method of claim 3 , further including disposing a thermally conductive via within the interconnect structure.

5. The method of claim 3 , further including disposing a second semiconductor die or component over a surface of the interconnect structure opposite the first semiconductor die.

6. A method of making a semiconductor device, comprising:

providing a first semiconductor die including a first bump formed over a surface of the first semiconductor die;

pressing the first bump into a penetrable adhesive layer to displace the penetrable adhesive layer; and

depositing an encapsulant over the first semiconductor die.

7. The method of claim 6 , further including completely embedding the first bump within the penetrable adhesive layer to reduce shifting of the first semiconductor die.

8. The method of claim 6 , further including disposing a second bump over the semiconductor die, the second bump including a cross-sectional area greater than the first bump.

9. The method of claim 6 , further including forming an interconnect structure over the first semiconductor die and electrically connected to the first bump.

10. The method of claim 6 , further including:

forming a thermally conductive via in the interconnect structure; and

disposing a heat sink over a surface of the interconnect structure opposite the first semiconductor die and connected to the thermally conductive via.

11. The method of claim 9 , further including disposing a second semiconductor die or component over a surface of the interconnect structure opposite the first semiconductor die.

12. A method of making a semiconductor device, comprising:

providing a first semiconductor die including bumps formed over the semiconductor die; and

disposing a penetrable adhesive layer over the first semiconductor die to embed the bumps.

13. The method of claim 12 , further including forming the bumps of the first semiconductor die on a surface of the first semiconductor die before disposing the penetrable adhesive layer over the first semiconductor die.

14. The method of claim 12 , further including forming a plurality of openings in the penetrable adhesive layer.

15. The method of claim 12 , further including forming an interconnect structure over the first semiconductor die.

16. The method of claim 15 , further including forming a thermally conductive via in the interconnect structure.

17. The method of claim 15 , further including disposing a heat sink over a surface of the interconnect structure opposite the first semiconductor die.

18. The method of claim 17 , further including disposing a second semiconductor die or component over a surface of the interconnect structure opposite the first semiconductor die.

19. A semiconductor device, comprising:

a first semiconductor die including a bump; and

a penetrable adhesive layer disposed over a surface of the first semiconductor die with the bump embedded within the penetrable adhesive layer.

20. The semiconductor device of claim 19 , further including an interconnect structure formed over the first semiconductor die and electrically connected to the bump.

21. The semiconductor device of claim 20 , further including a thermally conductive via formed in the interconnect structure.

22. The semiconductor device of claim 20 , further including a heat sink disposed over a surface of the interconnect structure opposite the first semiconductor die.

23. The semiconductor device of claim 20 , further including a second semiconductor die or component disposed over a surface of the interconnect structure opposite the first semiconductor die.

Assignments (5)
THIS SUBMISSION IS TO CORRECT A TYPOGRAPHICAL ERROR IN THE COVER SHEET PREVIOUSLY RECORDED ON REEL: 038378 FRAME: 0382 TO CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE." TO "STATS CHIPPAC PTE. LTD." Recorded Sep 6, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064869/0363 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2019
From: STATS CHIPPAC PTE. LTD.
To: JCET SEMICONDUCTOR (SHAOXING) CO., LTD.
Reel/Frame 051365/0680 →
RELEASE OF SECURITY INTEREST Recorded Dec 13, 2019
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 051285/0318 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0382 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →