IP Library Granted Patent US 9,601,462
Granted Patent B2
US 9,601,462 · App. 14/288,589 · Granted Mar 21, 2017

Semiconductor device and method of forming UBM structure on back surface of TSV semiconductor wafer

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Quick Facts
Patent No.
US 9,601,462
App. No.
14/288,589
Granted
Mar 21, 2017
Kind
B2
Abstract

A semiconductor device has a plurality of conductive vias formed through the semiconductor die with a first insulating layer around the conductive vias. A recess is formed in the first insulating layer around the conductive vias by LDA. A portion of the semiconductor wafer is removed by LDA after forming the recess in the first insulating layer so that the conductive vias extend above a surface of the semiconductor wafer. The first insulating layer extends to the surface of the semiconductor wafer or above the surface of the semiconductor wafer. A second insulating layer is formed over the surface of the semiconductor wafer and conductive vias. A first portion of the second insulating layer is removed by LDA, while leaving a second portion of the second insulating layer over the surface of the semiconductor wafer around the conductive vias. An electroless plated bump is formed over the conductive vias.

Claims (40)

1. A semiconductor device, comprising:

a semiconductor die;

a conductive via formed through the semiconductor die;

a first insulating layer formed around the conductive via and extending beyond a first surface of the semiconductor die;

a second insulating layer formed in direct contact with the first surface of the semiconductor die and extending over a portion of the first insulating layer which extends beyond the first surface of the semiconductor die to contact the conductive via, wherein a first end of the conductive via extends beyond the first insulating layer and second insulating layer, and the second insulating layer includes a first thickness over the portion of the first insulating layer and a second thickness greater than the first thickness over the first surface of the semiconductor die; and

a first bump formed in contact with the first end of the conductive via and a side surface of the conductive via.

2. The semiconductor device of claim 1 , further including a conductive layer formed between the first insulating layer and conductive via.

3. The semiconductor device of claim 1 , further including an underfill material formed over a second surface of the semiconductor die opposite the first surface of the semiconductor die.

4. The semiconductor device of claim 1 , wherein the first surface of the semiconductor die is a non-active surface of the semiconductor die.

5. The semiconductor device of claim 1 , further including a second bump formed over a second end of the conductive via opposite the first end of the conductive via.

6. The semiconductor device of claim 1 , further including a plurality of stacked semiconductor die electrically connected through the conductive via.

7. A semiconductor device, comprising:

a substrate;

a conductive via formed through the substrate;

a first insulating layer formed around the conductive via;

a second insulating layer formed over a first surface of the substrate and extending over the first insulating layer to contact the conductive via, wherein a first end of the conductive via extends beyond the first insulating layer and second insulating layer, and the second insulating layer includes a first thickness over the first insulating layer and a second thickness greater than the first thickness over the first surface of the substrate; and

a first bump formed in contact with the first end of the conductive via.

8. The semiconductor device of claim 7 , further including a conductive layer formed between the first insulating layer and conductive via.

9. The semiconductor device of claim 7 , further including an underfill material formed over a second surface of the substrate opposite the first surface of the substrate.

10. The semiconductor device of claim 7 , wherein the first surface of the substrate is a non-active surface of the substrate.

11. The semiconductor device of claim 7 , further including a second bump formed over a second end of the conductive via opposite the first end of the conductive via.

12. The semiconductor device of claim 7 , further including a plurality of stacked substrates electrically connected through the conductive via.

13. A semiconductor device, comprising:

a substrate;

a conductive via formed through the substrate;

a first insulating layer formed around the conductive via;

a second insulating layer formed over a surface of the substrate and extending over the first insulating layer to the conductive via, wherein the conductive via extends beyond the second insulating layer, and the second insulating layer includes a first thickness over the first insulating layer and a second thickness greater than the first thickness over the surface of the substrate; and

a first bump formed in contact with the conductive via.

14. The semiconductor device of claim 13 , wherein the first insulating layer extends at least to the surface of the substrate.

15. The semiconductor device of claim 13 , wherein the first insulating layer extends beyond the surface of the substrate.

16. The semiconductor device of claim 13 , further including a conductive layer formed between the first insulating layer and conductive via.

17. The semiconductor device of claim 13 , further including a second bump formed over the conductive via opposite the first bump.

18. The semiconductor device of claim 13 , further including a plurality of stacked substrates electrically connected through the conductive via.

19. A semiconductor device, comprising:

a substrate;

a conductive via formed through the substrate, wherein a first end of the conductive via terminates at a first surface of the substrate and a second end of the conductive via terminates at a second surface of the substrate opposite the first surface; and

an insulating layer formed around the conductive via, wherein the insulating layer terminates at the first surface of the substrate and terminates below the second surface of the substrate with a recess between the second end of the conductive via and the second surface of the substrate.

20. The semiconductor device of claim 19 , further including a conductive layer formed between the insulating layer and conductive via.

21. The semiconductor device of claim 19 , further including a bump formed over the first end of the conductive via.

22. The semiconductor device of claim 7 , wherein the first insulating layer extends beyond the first surface of the substrate.

Assignments (5)
THIS SUBMISSION IS TO CORRECT A TYPOGRAPHICAL ERROR IN THE COVER SHEET PREVIOUSLY RECORDED ON REEL: 038378 FRAME: 0382 TO CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE." TO "STATS CHIPPAC PTE. LTD." Recorded Sep 6, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064869/0363 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2019
From: STATS CHIPPAC PTE. LTD.
To: JCET SEMICONDUCTOR (SHAOXING) CO., LTD.
Reel/Frame 051365/0680 →
RELEASE OF SECURITY INTEREST Recorded Dec 13, 2019
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 051285/0318 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0382 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →