IP Library Granted Patent US 9,437,538
Granted Patent B2
US 9,437,538 · App. 14/292,925 · Granted Sep 6, 2016

Semiconductor device including RDL along sloped side surface of semiconductor die for Z-direction interconnect

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Quick Facts
Patent No.
US 9,437,538
App. No.
14/292,925
Granted
Sep 6, 2016
Kind
B2
Abstract

A semiconductor device has a first semiconductor die with a sloped side surface. The first semiconductor die is mounted to a temporary carrier. An RDL extends from a back surface of the first semiconductor die along the sloped side surface of the first semiconductor die to the carrier. An encapsulant is deposited over the carrier and a portion of the RDL along the sloped side surface. The back surface of the first semiconductor die and a portion of the RDL is devoid of the encapsulant. The temporary carrier is removed. An interconnect structure is formed over the encapsulant and exposed active surface of the first semiconductor die. The RDL is electrically connected to the interconnect structure. A second semiconductor die is mounted over the back surface of the first semiconductor die. The second semiconductor die has bumps electrically connected to the RDL.

Claims (49)

1. A semiconductor device, comprising:

a first semiconductor die including a first sloped side surface extending from an active surface to a back surface, the back surface smaller than the active surface;

a conductive layer contacting the back surface of the first semiconductor die and the first sloped side surface and including a segment comprising a surface coplanar with the active surface of the first semiconductor die;

an encapsulant disposed over the conductive layer and the first sloped side surface of the first semiconductor die, the back surface of the first semiconductor die being devoid of the encapsulant;

a redistribution layer (RDL) formed over the encapsulant and the back surface of the first semiconductor die;

an interconnect structure formed under the surface of the conductive layer that is coplanar with the active surface of the first semiconductor die and electrically connected to the conductive layer; and

a first bump formed under the interconnect structure.

2. The semiconductor device of claim 1 , further including:

a second semiconductor die disposed over the back surface of the first semiconductor die; and

a second bump disposed between the conductive layer and the second semiconductor die.

3. The semiconductor device of claim 1 , wherein the RDL physically contacts the back surface of the first semiconductor die and the encapsulant.

4. A semiconductor device, comprising:

a first semiconductor die including a sloped side surface extending from an active surface to a back surface, the back surface smaller than the active surface;

a conductive layer formed over the back surface and sloped side surface;

an encapsulant disposed over the conductive layer;

a redistribution layer (RDL) formed over the back surface of the first semiconductor die and encapsulant; and

an interconnect structure including an insulating layer formed under the first semiconductor die and encapsulant and electrically connected to the conductive layer.

5. The semiconductor device of claim 4 , further including:

a second semiconductor die disposed over the back surface; and

a bump disposed between the conductive layer and the second semiconductor die.

6. The semiconductor device of claim 4 , further including a shielding layer formed over the back surface.

7. The semiconductor device of claim 4 , further including a heat sink disposed over the back surface.

8. The semiconductor device of claim 4 , wherein the back surface of the first semiconductor die is devoid of the encapsulant.

9. The semiconductor device of claim 4 , wherein the conductive layer physically contacts the back surface of the first semiconductor die.

10. The semiconductor device of claim 4 , wherein the RDL physically contacts the back surface of the first semiconductor die and the encapsulant.

11. The semiconductor device of claim 4 , further including an underfill material disposed under the active surface opposite the back surface of the first semiconductor die.

12. A semiconductor device, comprising:

a first semiconductor die including a sloped side surface extending from an active surface to a back surface, the back surface smaller than the active surface;

a conductive layer formed over the sloped side surface and including a first segment that is coplanar with the active surface of the first semiconductor die and a second segment in contact with the back surface of the first semiconductor die;

an encapsulant disposed over the conductive layer;

a redistribution layer (RDL) formed over the encapsulant and the back surface of the first semiconductor die;

a first interconnect structure formed under the first semiconductor die; and

an external connection provided by a second interconnect structure formed under the first interconnect structure.

13. The semiconductor device of claim 12 , wherein the first interconnect structure is electrically connected to the conductive layer.

14. The semiconductor device of claim 12 , further including:

a second semiconductor die disposed over the back surface of the first semiconductor die; and

a bump disposed between the conductive layer and the second semiconductor die.

15. The semiconductor device of claim 12 , wherein the active surface of the first semiconductor die is devoid of first segment of the conductive layer.

16. A semiconductor device, comprising:

a first semiconductor die including a sloped side surface extending from an active surface to a back surface, the back surface smaller than the active surface;

a conductive layer formed over the back surface and sloped side surface;

an encapsulant disposed over the conductive layer; a redistribution layer (RDL) formed over the back surface of the first semiconductor die and encapsulant; and

an interconnect structure formed under the first semiconductor die including an external connection.

17. The semiconductor device of claim 16 , wherein the interconnect structure is electrically connected to the conductive layer.

18. The semiconductor device of claim 16 , further including:

a second semiconductor die disposed over the back surface; and

a bump disposed between the conductive layer and the second semiconductor die.

19. The semiconductor device of claim 16 , further including a shielding layer formed over the back surface.

20. The semiconductor device of claim 16 , further including an underfill material disposed under the active surface opposite the back surface of the first semiconductor die.

Assignments (5)
THIS SUBMISSION IS TO CORRECT A TYPOGRAPHICAL ERROR IN THE COVER SHEET PREVIOUSLY RECORDED ON REEL: 038378 FRAME: 0382 TO CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE." TO "STATS CHIPPAC PTE. LTD." Recorded Sep 6, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064869/0363 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2019
From: STATS CHIPPAC PTE. LTD.
To: JCET SEMICONDUCTOR (SHAOXING) CO., LTD.
Reel/Frame 051365/0680 →
RELEASE OF SECURITY INTEREST Recorded Dec 13, 2019
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 051285/0318 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0382 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →