IP Library › Granted Patent US 10,483,293
Granted Patent B2
US 10,483,293 · App. 14/628,657 · Granted Nov 19, 2019

Active matrix display device, and module and electronic appliance including the same

Inventor: Hiroyuki Miyake (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L27/1255G09G3/3233G09G3/3266G09G3/3291H01L27/124H01L27/1225H01L27/1251H01L29/78648G09G2300/0819G09G2300/0842G09G2300/0861G09G2310/0248G09G2310/0286G09G2310/0297
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Quick Facts
Patent No.
US 10,483,293
App. No.
14/628,657
Granted
Nov 19, 2019
Kind
B2
Abstract

First to fourth switches are provided so that conduction states are able to be controlled independently of each other. The first switch, the third switch, and the second switch are electrically connected in series between a first wiring and a third wiring. The fourth switch has a function of controlling a conduction state between the light-emitting element and a fourth wiring. In a first transistor, a gate is electrically connected to a node to which the third switch and the second switch are electrically connected, one of a source and a drain is electrically connected to a second wiring, and the other is electrically connected to the light-emitting element. A capacitor includes first and second electrodes, the first electrode is electrically connected to a node to which the first switch and the third switch are electrically connected, and the second electrode is electrically connected to the light-emitting element.

Claims (56)

1. A semiconductor device comprising:

first to fifth transistors;

a first capacitor comprising first and second electrodes;

a pixel electrode;

first to third gate wirings; and

first to fourth wirings,

wherein the second transistor, the fourth transistor, and the third transistor are electrically connected in series between the first wiring and the third wiring;

wherein the first electrode is electrically connected to a first node to which the second transistor and the fourth transistor are electrically connected,

wherein one of a source and a drain of the fifth transistor is electrically connected to the fourth wiring,

wherein the second electrode is electrically connected to the pixel electrode,

wherein a gate of the first transistor is electrically connected to a second node to which the fourth transistor and the third transistor are electrically connected,

wherein one of a source and a drain of the first transistor is electrically connected to the second wiring,

wherein the other of the source and the drain of the first transistor is electrically connected to the pixel electrode and the other of the source and the drain of the fifth transistor,

wherein the first gate wiring is electrically connected to a gate of the second transistor,

wherein the second gate wiring is electrically connected to a gate of the third transistor;

wherein the third gate wiring is electrically connected to a gate of the fourth transistor,

wherein the first gate wiring is not electrically connected t second gate wiring, and

wherein the third gate wiring is not electrically connected to the first gate wiring and the second gate wiring.

2. The semiconductor device according to claim 1 ,

wherein the first to fifth transistors are n-channel transistors.

3. The semiconductor device according to claim 1 ,

wherein the first to fifth transistors comprises an oxide semiconductor layer including a region in which a channel is formed.

4. A module comprising:

the semiconductor device according to claim 1 ; and

at least one of a touch sensor or a circuit board.

5. An electronic appliance comprising:

the semiconductor device according to claim 1 ; and

at least one of a housing, a microphone, a speaker, or an operation key.

6. A semiconductor device comprising:

first to fifth transistors;

a first light-emitting element;

a first capacitor comprising first and second electrodes;

first to third gate wirings; and

first to fourth wirings,

wherein the second transistor, the fourth transistor, and the third transistor are electrically connected in series between the first wiring and the third wiring,

wherein the first electrode is electrically connected to a first node to which the second transistor and the fourth transistor are electrically connected,

wherein one of a source and a drain of the fifth transistor is electrically connected to the fourth wiring,

wherein the second electrode is electrically connected to the first light-emitting element,

wherein a gate of the first transistor is electrically connected to a second node to which the fourth transistor and the third transistor are electrically connected,

wherein one of a source and a drain of the first transistor is electrically connected to the second wiring,

wherein the other of the source and the drain of the first transistor is electrically connected to the first light-emitting element and the other of the source and the drain of the fifth transistor,

wherein the first gate wiring is electrically connected to a gate of the second transistor,

wherein the second gate wiring is electrically connected to a gate of the third transistor,

wherein the third gate wiring is electrically connected to a gate of the fourth transistor,

wherein the first gate wiring is not electrically connected to the second gate wiring, and

wherein the third gate wiring is not electrically connected to the first gate wiring and the second gate wiring.

7. The semiconductor device according to claim 6 ,

wherein the first to fifth transistors are n-channel transistors.

8. The semiconductor device according to claim 6 ,

wherein the first to fifth transistors comprises an oxide semiconductor layer including a region in which a channel is formed.

9. A module comprising:

the semiconductor device according to claim 6 ; and

at least one of a touch sensor or a circuit board.

10. An electronic appliance comprising:

the semiconductor device according to claim 6 ; and

at least one of a housing, a microphone, a speaker, or an operation key.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 6, 2015
From: MIYAKE, HIROYUKI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 035577/0701 →
Priority Claims (1)
JP 2014-037156 · Feb 27, 2014 · national
Continuity (1)
Related Publication 20150287749A1 · Oct 8, 2015
Cited By (8)
US 12,232,368 US 12,367,832 US 12,387,680 US 12,387,805 US 12,396,263 US 12,453,180 US 12,482,413 US 12,555,516