Three-dimensional NAND non-volatile memory and DRAM memory devices on a single substrate

1. A device comprising:

a three-dimensional NAND stacked non-volatile memory array; and

a DRAM memory array,

wherein the three-dimensional NAND stacked non-volatile memory array and the DRAM memory array are integrated on a single substrate.

2. The device of claim 1 , wherein the three-dimensional NAND stacked non-volatile memory array comprises alternating word line and dielectric layers and a plurality of NAND strings of memory cells formed in memory holes which extend through the layers, wherein each memory cell comprises a control gate formed by one of the word line layers.

3. The device of claim 1 , further comprising first and second selector devices disposed in the substrate, wherein:

the three-dimensional NAND stacked non-volatile memory array comprises a NAND string of memory cells disposed above the substrate, the NAND string coupled to the first selector device, and

the DRAM memory array comprises a DRAM memory cell, the DRAM memory cells comprising the second selector device.

4. The device of claim 3 , wherein each selector device comprises a buried word line.

5. The device of claim 3 , the three-dimensional NAND stacked non-volatile memory array further comprising a select gate transistor comprising the first selector device.

6. The device of claim 5 , wherein the select gate transistor comprises a source-side select gate transistor or a drain-side select gate transistor.