Solid state lighting devices with reduced crystal lattice dislocations and associated methods of manufacturing
Solid state lighting devices and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state lighting device includes a substrate material having a substrate surface and a plurality of hemispherical grained silicon (“HSG”) structures on the substrate surface of the substrate material. The solid state lighting device also includes a semiconductor material on the substrate material, at least a portion of which is between the plurality of HSG structures.
1. A solid state lighting device, comprising:
a plurality of hemispherical grained silicon (HSG) structures positioned on a substrate surface;
a single-crystal semiconductor material positioned on the substrate surface and the plurality of HSG structures; and
an active region proximate the single-crystal semiconductor material, the active region including gallium nitride (GaN)/indium gallium nitride (InGaN) multiple quantum wells.
2. The solid state lighting device of claim 1 wherein the substrate surface is a generally-planar surface.
3. The solid state lighting device of claim 1 wherein the individual HSG structure includes a base proximate the substrate surface, an apex spaced apart from the base, and a side surface between the base and the apex.
4. The solid state lighting device of claim 3 wherein the side surface includes a hemispherical surface.
5. The solid state lighting device of claim 1 wherein the single-crystal semiconductor material substantially encapsulates the plurality of HSG structures.
6. The solid state lighting device of claim 1 wherein the plurality of HSG structures are arranged as an array.
7. The solid state lighting device of claim 6 wherein the array has a pitch, and wherein the pitch is determined based on a desired dislocation density of the single-crystal semiconductor material.
8. The solid state lighting device of claim 6 wherein the plurality of HSG structures includes multiple bases, and wherein the adjacent bases are spaced apart from one another by a gap.
9. The solid state lighting device of claim 8 wherein a portion of the substrate surface is exposed by the gap.
10. The solid state lighting device of claim 6 wherein the plurality of HSG structures are positioned based on a side-by-side arrangement.
11. The solid state lighting device of claim 6 wherein the plurality of HSG structures are aligned based on a crystal orientation of the substrate surface.
12. An apparatus for supporting a solid state lighting device, comprising:
a substrate surface;
a plurality of hemispherical grained silicon (HSG) structures positioned on the substrate surface based on a crystal orientation of the substrate surface;
a single-crystal semiconductor material positioned on the substrate surface and the plurality of HSG structures; and
an active region proximate the single-crystal semiconductor material, the active region including a bulk indium gallium nitride (InGaN) material.
13. The apparatus of claim 12 wherein the individual HSG structure includes a base proximate the substrate surface, an apex spaced apart from the base, and a side surface between the base and the apex.
14. The apparatus of claim 13 wherein the base and the apex of the individual HSG structure have a Si (1,1,1) crystal orientation.
15. The apparatus of claim 13 wherein the side surface is not at any preferential growth planes.
16. The apparatus of claim 12 wherein the crystal orientation of the substrate surface includes a Si (1,1,1) crystal orientation.
17. The apparatus of claim 12 wherein the crystal orientation of the substrate surface includes a Si (1,0,0) crystal orientation.
18. A microelectronic device, comprising:
a plurality of hemispherical grained silicon (HSG) structures positioned on a substrate surface;
a single-crystal semiconductor material positioned on the substrate surface and the plurality of HSG structures; and
an active region proximate the single-crystal semiconductor material, the active region including an indium gallium nitride (InGaN) single quantum well.
19. The microelectronic device of claim 18 wherein the individual HSG structure includes a base proximate the substrate surface, an apex spaced apart from the base, and a side surface between the base and the apex.
20. The microelectronic device of claim 18 wherein the side surface includes a hemispherical surface, and wherein the hemispherical surface is not at any preferential growth planes.