IP Library Granted Patent US 10,339,984
Granted Patent B2
US 10,339,984 · App. 15/997,417 · Granted Jul 2, 2019

Device having multiple channels with calibration circuit shared by multiple channels

Inventors: Tetsuya Arai (Tokyo, JP); Junki Taniguchi (Tokyo, JP)
Assignee: Micron Technology, Inc.
G11C7/04G11C5/025G11C11/4093G11C29/021G11C29/025G11C29/028H03K19/018507H03K19/018585G11C11/401G11C2207/105G11C2207/2254
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Quick Facts
Patent No.
US 10,339,984
App. No.
15/997,417
Granted
Jul 2, 2019
Kind
B2
Abstract

An apparatus includes a first channel, a second channel and a calibration circuit. The first channel includes a first command control circuit. The second channel includes a second command control circuit independent of the first command control circuit. The calibration circuit is shared by the first channel and the second channel to generate a calibration code responsive to a calibration command generated responsive to a first calibration command from the first command control circuit and a second calibration command from the second command control circuit.

Claims (46)

1. An apparatus comprising:

a first output circuit;

a second output circuit; and

a calibration circuit coupled in parallel to the first output circuit and the second output circuit, the calibration circuit configured to perform a first calibration operation responsive to a first calibration command to produce a first calibration code, supply the first calibration code to the first output circuit responsive to a first latch command and supply the first calibration code to the second output circuit responsive to a second latch command.

2. The apparatus of claim 1 , wherein the calibration circuit is further configured to receive a second calibration command and ignore the second calibration command when the second calibration command has been received while the first calibration operation is being performed.

3. The apparatus of claim 1 , wherein the calibration circuit is further configured to receive a second calibration command and perform a second calibration operation responsive to the second calibration command to produce a second calibration code when the second calibration command is received after the first calibration operation has been finished.

4. The apparatus of claim 3 , further comprising a common resistor used in each of the first and second calibration operations.

5. The apparatus of claim 3 further comprising an arbiter configured to arbitrate the first calibration command and the second calibration command to provide a command signal to the calibration circuit to perform the first calibration operation or the second calibration operation.

6. The apparatus of claim 1 further comprising:

a first relay circuit coupled to the calibration circuit and the first output circuit, the first relay circuit configured to store the first calibration code responsive to a first update command; and

a second relay circuit coupled to the calibration circuit and the second output circuit, the second relay circuit configured to store the first calibration code responsive to a second update command.

7. The apparatus of claim 1 , wherein each of the first output circuit and the second circuit comprises an n-type pull up transistor and an n-type pull down transistor.

8. A method comprising:

receiving a first calibration command at a calibration circuit;

performing a first calibration operation responsive to the first calibration command to produce a first calibration code;

supplying the first calibration code to a first output circuit, causing the first output circuit to change impedance responsive to at least a portion of the first calibration code; and

supplying the first calibration code to a second output circuit, causing the second output circuit to change impedance responsive to at least a portion of the first calibration code.

9. The method of claim 8 further comprising:

receiving a second calibration command at the calibration circuit; and

ignoring the second calibration command when the second calibration command has been received while the first calibration operation is being performed.

10. The method of claim 8 further comprising:

receiving a second calibration command at the calibration circuit; and

performing a second calibration operation responsive to the second calibration command to produce a second calibration code when the second calibration command is received after the first calibration operation has been finished.

11. The method of claim 10 further comprising:

arbitrating the first calibration command and the second calibration command to provide a command signal to the calibration circuit to perform the first calibration operation or the second calibration operation.

12. The method of claim 8 , wherein causing the first output circuit to change the impedance comprises activating one or more pull up units in the first output circuit, wherein each of the pull up units is configured to change impedance responsive to a pull up code of the first calibration code.

13. The method of claim 8 , wherein causing the first output circuit to change the impedance comprises activating one or more pull down units in the first output circuit, wherein each of the pull down units is configured to change impedance responsive to a pull down code of the first calibration code.

14. An apparatus comprising:

a first output circuit;

a second output circuit;

a calibration circuit configured to perform a calibration operation to generate a calibration code responsive to a command signal;

a multiplexer coupled to the calibration circuit and coupled in parallel to the first output circuit and the second output circuit, wherein the multiplexer is configured to select one of the calibration code and a default code to the first output circuit and the second output circuit responsive to a calibration control signal and an output-level select signal.

15. The apparatus of claim 14 further comprising:

an arbiter coupled to the calibration circuit, the arbiter configured to be supplied with a first calibration command and a second calibration command independently of each other and arbitrate the first calibration command and the second calibration command to provide the command signal.

16. The apparatus of claim 15 further comprising:

a calibration control signal generation circuit coupled to the arbiter and the calibration circuit, the calibration control signal generation circuit configured to generate the calibration control signal responsive to the command signal and supply the calibration control signal to the multiplexer and the calibration circuit.

17. The apparatus of claim 16 , wherein the calibration circuit is further configured to start performing the calibration operation responsive to an activation of the calibration control signal and generate a calibration end signal when the calibration operation is complete.

18. The apparatus of claim 17 , wherein the calibration circuit is further configured to supply the calibration end signal to the calibration control signal generation circuit and the arbiter.

19. The apparatus of claim 15 , wherein the arbiter comprises a promotion circuit configured to activate a first command control signal or a second command control signal responsive to the first calibration command and/or the second calibration command, by:

responsive to an activation of the first calibration command:

activating the first command control signal; and

deactivating the second command control signal if the second control signal is already activated at the time the first calibration command is activated; and

responsive to an activation of the second calibration command:

activating the second command control signal when the first command control signal is not activated at the time the second calibration command is activated; and

not activating the second command control signal when the first command control signal is already activated at the time the second calibration command is activated.

20. The apparatus of claim 19 , wherein the arbiter is further configured to provide the command signal based on the first command control signal and the second command control signal.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 11, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050713/0001 →
SUPPLEMENT NO. 9 TO PATENT SECURITY AGREEMENT Recorded Aug 9, 2018
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 047282/0463 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 4, 2018
From: ARAI, TETSUYA; TANIGUCHI, JUNKI
To: MICRON TECHNOLOGY, INC.
Reel/Frame 045982/0893 →
Priority Claims (1)
JP 2014-105195 · May 21, 2014 · national
Continuity (3)
Continuation 15490690 · Apr 18, 2017
Continuation 14695837 · Apr 24, 2015
Related Publication 20180286467A1 · Oct 4, 2018
Cited By (3)
US 12,231,106 US 12,249,969 US 12,695,453