Nonvolatile semiconductor memory device and method for manufacturing same
A nonvolatile semiconductor memory device, includes: a stacked structural unit including a plurality of insulating films alternately stacked with a plurality of electrode films in a first direction; a selection gate electrode stacked on the stacked structural unit in the first direction; an insulating layer stacked on the selection gate electrode in the first direction; a first semiconductor pillar piercing the stacked structural unit, the selection gate electrode, and the insulating layer in the first direction, a first cross section of the first semiconductor pillar having an annular configuration, the first cross section being cut in a plane orthogonal to the first direction; a first core unit buried in an inner side of the first semiconductor pillar, the first core unit being recessed from an upper face of the insulating layer; and a first conducting layer of the first semiconductor pillar provided on the first core unit to contact the first core unit.
1. A semiconductor memory device, comprising:
a layer-stack including a plurality of first electrode films and a plurality of first insulating films alternately stacked in a first direction, the plurality of first electrode films respectively including a semiconductor material;
an electrode provided above the layer-stack via a second insulating film and including a semiconductor material;
a first semiconductor pillar extending through the layer-stack and the electrode in the first direction, the first semiconductor pillar having an annular shape when viewed from the first direction;
a first metal plug disposed above the first semiconductor pillar; and
a first semiconductor layer extending inside the first semiconductor pillar in the first direction and being in contact with the first metal plug and an inner wall of the first semiconductor pillar, wherein
the first metal plug is in contact with the first semiconductor pillar via the first semiconductor layer.
2. The device according to claim 1 , further comprising:
a stacked film provided between the first semiconductor pillar and the plurality of first electrode films,
the stacked film including:
a charge storage layer provided between the first semiconductor pillar and the plurality of first electrode films;
a third insulating film provided between the plurality of first electrode films and the charge storage layer; and
a fourth insulating film provided between the first semiconductor pillar and the charge storage layer.
3. The device according to claim 1 , further comprising:
a second semiconductor pillar adjacent to the first semiconductor pillar in a second direction crossing the first direction, the second semiconductor pillar extending through the layer-stack and the electrode in the first direction, the second semiconductor pillar having an annular shape when viewed from the first direction;
a second metal plug disposed above the second semiconductor pillar;
a second semiconductor layer extending inside the second semiconductor pillar in the first direction and being in contact with the second metal plug and an inner wall of the second semiconductor pillar;
a connection portion contacting a lower end of the first semiconductor pillar and a lower end of the second semiconductor pillar.
4. The device according to claim 3 , further comprising:
a first core disposed in an inner side of the first semiconductor pillar; and
a second core disposed in an inner side of the second semiconductor pillar, wherein:
the first core includes a fifth insulating film and a first conducting layer, the fifth insulating film provided on the inner wall of the first semiconductor pillar, the first conducting layer disposed on an inner side of the fifth insulating film and in contact with the first semiconductor layer;
the second core includes a sixth insulating film and a second conducting layer, the sixth insulating film being provided on the inner wall of the second semiconductor pillar, the second conducting layer disposed on an inner side of the sixth insulating film and in contact with the second semiconductor layer; and
the fifth insulating film and the sixth insulating film are in contact with each other in the connection portion, and the first conducting layer and the second conducting layer are not in contact with each other in the connection portion.
5. The device according to claim 1 , wherein the first semiconductor layer includes polysilicon.
6. The device according to claim 1 , wherein the first semiconductor pillar includes polysilicon.
7. The device according to claim 1 , further comprising an insulating layer stacked on the electrode in the first direction, wherein the insulating layer includes silicon and oxygen elements.
8. The device according to claim 7 , further comprising a first core disposed through the first semiconductor pillar in the first direction, the first core being recessed from an upper face of the insulating layer, wherein the first core includes silicon nitride.
9. The device according to claim 7 , further comprising a first core disposed through the first semiconductor pillar in the first direction, the first core being recessed from an upper face of the insulating layer, wherein the first core includes silicon oxide.
10. The device according to claim 1 , further comprising:
an insulating layer stacked on the electrode in the first direction; and
a first core disposed through the first semiconductor pillar in the first direction, the first core being recessed from an upper face of the insulating layer,
wherein an upper end of the first semiconductor pillar is disposed above an upper end of the first core.
11. The device according to claim 1 , further comprising:
an insulating layer stacked on the electrode in the first direction; and
a first core extending through the first semiconductor pillar in the first direction, the first core being recessed from an upper face of the insulating layer,
wherein an upper end of the first core is disposed above the electrode and below an upper end of the insulating layer.
12. The device according to claim 11 , further comprising:
a source-drain diffusion region provided in the first semiconductor pillar at a position proximal to an upper end of the electrode,
a lower end of the source-drain diffusion region being positioned downward from the upper end of the electrode.
13. The device according to claim 1 , further comprising:
an insulating layer stacked on the electrode in the first direction; and
a first core extending through the first semiconductor pillar in the first direction, the first core being recessed from an upper face of the insulating layer,
wherein an upper end of the first core is disposed between an upper end and a lower end of the electrode, and a lower end of the first semiconductor layer faces the electrode.
14. The device according to claim 1 , further comprising:
an insulating layer stacked on the electrode in the first direction; and
a first core disposed through the first semiconductor pillar in the first direction, the first core being recessed from an upper face of the insulating layer,
wherein the first core includes a barrier insulating film and a conducting layer, the barrier insulating film being provided on a side wall of the first semiconductor pillar, the conducting layer disposed on an inner side of the barrier insulating film and in contact with the first semiconductor layer.
15. The device according to claim 1 , further comprising an insulating layer stacked on the electrode in the first direction, wherein a diameter of the first semiconductor pillar opposing to an upper end of the insulating layer is larger than a diameter of the first semiconductor pillar opposing to the electrode.