Granted Patent B2

US 11,016,917 · App. 16/911,312 · Granted May 25, 2021

Inventors: Mark Moshayedi (Newport Coast, CA); Seyed Jalal Sadr (Irvine, CA)

Assignee: Western Digital Technologies, Inc.

G06F13/28G06F3/0611G06F3/0659G06F3/0679G06F12/0246G06F13/102G06F13/1668G06F13/4068G06F13/42G06F2212/7202

Abstract

Claims (81)

1. A data storage system, comprising:

memories; and

one or more controllers configured to cause:

obtaining a protocol signal identifying a first communication protocol or a second communication protocol;

transmitting an indication to perform a first direct memory access operation corresponding to the first communication protocol;

after receiving an acknowledgement for the first direct memory access operation, performing the first direct memory access operation for transferring data between the memories of the data storage system and a host, using the first communication protocol; and

when the protocol signal identifies the second communication protocol, performing a data transfer operation using the second communication protocol.

2. The data storage system of claim 1 ,

wherein the one or more controllers are configured to cause:

prior to transmitting the indication,

receiving a request signal, from the host, indicating a request for the first direct memory access operation; and

receiving a response signal indicating readiness by the data storage system to transfer data for the request, and

wherein the indication includes a ready signal.

3. The data storage system of claim 1 ,

wherein the one or more controllers are configured to cause obtaining an address from a memory in response to a request for the first direct memory access operation, and

wherein performing the first direct memory access operation comprises performing the first direct memory access operation at sequential addresses in the memories starting at the address.

4. The data storage system of claim 1 , wherein performing the first direct memory access operation comprises:

receiving a data block from the host by the data storage system;

erasing a storage block in the data storage system; and

writing the data block to the storage block.

5. The data storage system of claim 3 , wherein the one or more controllers are configured to cause:

receiving a request from the host by the data storage system; and

performing a second direct memory access operation based on the request at the address of the data storage system, the second direct memory access operation comprising reading one or more data blocks from the data storage system.

6. The data storage system of claim 5 , wherein performing the data transfer operation using the second communication protocol comprises performing the second direct memory access operation using the second communication protocol.

7. The data storage system of claim 1 , wherein the second communication protocol is a standard communication protocol, and the first communication protocol is a non-standard communication protocol.

8. The data storage system of claim 1 , wherein performing the first direct memory access operation comprises:

receiving a first data block from the host by the data storage system;

storing the first data block in the data storage system at a predetermined address;

receiving a second data block from the host by the data storage system;

incrementing the predetermined address by the data storage system to determine a next address; and

storing the second data block in the data storage system at the next address.

9. The data storage system of claim 1 , wherein the one or more controllers are configured to cause:

receiving, from the host, a first request for the first direct memory access operation;

connecting the data storage system to the host before performing the first direct memory access operation;

disconnecting the data storage system from the host after performing the first direct memory access operation;

receiving, from a second host, a second request for a second direct memory access operation; and

connecting the data storage system to the second host before performing the second direct memory access operation.

10. A method, comprising:

obtaining a protocol signal identifying a first communication protocol or a second communication protocol;

transmitting an indication to perform a first direct memory access operation corresponding to the first communication protocol;

after receiving an acknowledgement associated with the first direct memory access operation, performing the first direct memory access operation for transferring data between memories of a data storage system and a host, using the first communication protocol; and

when the protocol signal identifies the second communication protocol, performing a data transfer operation using the second communication protocol.

11. The method of claim 10 , comprising:

prior to transmitting the indication,

receiving a request signal, from the host, indicating a request for the first direct memory access operation; and

receiving a response signal indicating readiness by the data storage system to transfer data for the request, and

wherein the indication includes a ready signal.

12. The method of claim 10 , comprising:

obtaining an address from a memory in response to a request for the first direct memory access operation,

wherein performing the first direct memory access operation comprises performing the first direct memory access operation at sequential addresses in the memories starting at the address.

13. The method of claim 10 , wherein performing the first direct memory access operation comprises:

receiving a data block from the host by the data storage system;

erasing a storage block in the data storage system; and

writing the data block to the storage block.

14. The method of claim 12 , comprising:

receiving a request from the host by the data storage system; and

performing a second direct memory access operation based on the request at the address of the data storage system, the second direct memory access operation comprising reading one or more data blocks from the data storage system.

15. The method of claim 14 , wherein performing the data transfer operation using the second communication protocol comprises performing the second direct memory access operation using the second communication protocol.

16. The method of claim 10 , comprising:

receiving, from the host, a first request for the first direct memory access operation;

connecting the data storage system to the host before performing the first direct memory access operation;

disconnecting the data storage system from the host after performing the first direct memory access operation;

receiving, from a second host, a second request for a second direct memory access operation; and

connecting the data storage system to the second host before performing the second direct memory access operation.

17. An apparatus, comprising:

means for obtaining a protocol signal identifying a first communication protocol or a second communication protocol;

means for transmitting an indication to perform a first direct memory access operation corresponding to the first communication protocol;

after receiving an acknowledgement associated with the first direct memory access operation, means for performing the first direct memory access operation for transferring data between memories of a data storage system and a host, using the first communication protocol; and

when the protocol signal identifies the second communication protocol, means for performing a data transfer operation using the second communication protocol.

18. The apparatus of claim 17 , comprising:

prior to transmitting the indication,

means for receiving a request signal, from the host, indicating a request for the first direct memory access operation; and

means for receiving a response signal indicating readiness by the data storage system to transfer data for the request, and

wherein the indication includes a ready signal.

19. The apparatus of claim 17 , comprising:

means for obtaining an address from a memory in response to a request for the first direct memory access operation,

wherein the means for performing the first direct memory access operation comprises means for performing the first direct memory access operation at sequential addresses in the memories starting at the address.

20. The apparatus of claim 17 , wherein the means for performing the first direct memory access operation comprises:

means for receiving a data block from the host by the data storage system;

means for erasing a storage block in the data storage system; and

means for writing the data block to the storage block.

Assignments (13)

Continuity (5)