IP Library Granted Patent US 12,272,713
Granted Patent B2
US 12,272,713 · App. 17/295,135 · Granted Apr 8, 2025

Semiconductor apparatus and electronic equipment

Inventor: Hideto Hashiguchi (Kanagawa, JP)
Assignee: Sony Semiconductor Solutions Corporation
H01L27/14636H01L27/14643
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,272,713
App. No.
17/295,135
Granted
Apr 8, 2025
Kind
B2
Abstract

A semiconductor apparatus and electronic equipment are provided that allow improvement of bondability between a first electrode section and a second electrode section. A semiconductor apparatus includes a first interconnect section, a first interlayer insulating film covering one surface side of the first interconnect section, a first electrode section in a first through-hole in the first interlayer insulating film and electrically connected to the first interconnect section, a second interconnect section, a second interlayer insulating film covering a surface side of the second interconnect section facing the first interconnect section, and a second electrode section in a second through-hole in the second interlayer insulating film and electrically connected to the second interconnect section. The first electrode section and the second electrode section are directly bonded to each other. The first electrode section has a larger coefficient of thermal expansion than that of the first interconnect section.

Claims (69)

1. A semiconductor apparatus, comprising:

a first interconnect section;

a first interlayer insulating film covering and in contact with at least one surface side of the first interconnect section;

a first electrode section provided in a first through-hole provided in the first interlayer insulating film, the first electrode section being electrically connected to the first interconnect section;

a second interconnect section;

a second interlayer insulating film covering and in contact with at least one surface side of the second interconnect section facing the first interconnect section; and

a second electrode section provided in a second through-hole provided in the second interlayer insulating film, the second electrode section being electrically connected to the second interconnect section,

wherein the first electrode section and the second electrode section are directly bonded to each other,

wherein the first interconnect section includes a first metal including Au and the first electrode section includes an alloy containing the first metal including Au, and

wherein the first electrode section has a larger coefficient of thermal expansion than a coefficient of thermal expansion of the first interconnection section and the second electrode section has a larger coefficient of thermal expansion than a coefficient of thermal expansion of the second interconnect section.

2. The semiconductor apparatus according to claim 1 , wherein the first electrode section further includes an alloy containing a second metal including Sn or Zn.

3. The semiconductor apparatus according to claim 1 , further comprising:

a first seed layer provided in the first through-hole in contact with the first electrode section,

wherein the first seed layer contains the second metal including Sn or Zn.

4. The semiconductor apparatus according to claim 1 , wherein

the second interconnect section includes a third metal including Au, and

the second electrode section includes an alloy containing the third metal including Au and a fourth metal including Sn or Zn.

5. The semiconductor apparatus according to claim 4 , further comprising:

a second seed layer provided in the second through-hole in contact with the second electrode section,

wherein the second seed layer contains the fourth metal including Sn or Zn.

6. The semiconductor apparatus according to claim 1 , further comprising a first barrier layer provided in the first through-hole and located between the first interconnect section and the first electrode section, the first barrier layer having conductivity.

7. The semiconductor apparatus according to claim 1 , further comprising a second barrier layer provided in the second through-hole and located between the second interconnect section and the second electrode section, the second barrier layer having conductivity.

8. The semiconductor apparatus according to claim 1 , wherein

the first electrode section includes an alloy containing the first metal including Au and a second metal including Sn or Zn,

the second interconnect section includes a third metal including Au,

the second electrode section includes an alloy containing the third metal Au and a fourth metal including Sn or Zn, and

the first metal and the third metal include an identical element.

9. The semiconductor apparatus according to claim 8 , wherein the second metal and the fourth metal include an identical element.

10. The semiconductor apparatus according to claim 1 , further comprising:

a first substrate; and

a second substrate disposed to face one surface of the first substrate,

wherein the first electrode section is provided on one surface side of the first substrate, and

wherein the second electrode section is provided on a surface side of the second substrate facing the first substrate.

11. Electronic equipment, comprising:

an optical system;

a semiconductor apparatus that receives light from the optical system, the semiconductor apparatus, including:

a first interconnect section;

a first interlayer insulating film covering and in contact with at least one surface side of the first interconnect section;

a first electrode section provided in a first through-hole provided in the first interlayer insulating film, the first electrode section being electrically connected to the first interconnect section;

a second interconnect section;

a second interlayer insulating film covering and in contact with at least one surface side of the second interconnect section facing the first interconnect section; and

a second electrode section provided in a second through-hole provided in the second interlayer insulating film, the second electrode section being electrically connected to the second interconnect section,

wherein the first electrode section and the second electrode section are directly bonded to each other,

wherein the first interconnection section includes a first metal including Au and the first electrode section includes an alloy containing the first metal including Au, and

wherein the first electrode section has a larger coefficient of thermal expansion than a coefficient of thermal expansion of the first interconnection section and the second electrode section has a larger coefficient of thermal expansion than a coefficient of thermal expansion of the second interconnect section; and

a signal processing circuit that processes signals received from the semiconductor apparatus.

12. The electronic equipment according to claim 11 , wherein the first electrode section further includes an alloy containing a second metal including Sn or Zn.

13. The electronic equipment according to claim 12 , further comprising:

a first seed layer provided in the first through-hole in contact with the first electrode section,

wherein the first seed layer contains the second metal including Sn or Zn.

14. The electronic equipment according to claim 11 , wherein

the second interconnect section includes a third metal including Au, and

the second electrode section includes an alloy containing the third metal including Au and a fourth metal including Sn or Zn.

15. The electronic equipment according to claim 14 , further comprising:

a second seed layer provided in the second through-hole in contact with the second electrode section,

wherein the second seed layer contains the fourth metal including Sn or Zn.

16. The electronic equipment according to claim 11 , further comprising a first barrier layer provided in the first through-hole and located between the first interconnect section and the first electrode section, the first barrier layer having conductivity.

17. The electronic equipment according to claim 11 , further comprising a second barrier layer provided in the second through-hole and located between the second interconnect section and the second electrode section, the second barrier layer having conductivity.

18. The electronic equipment according to claim 11 , wherein

the first electrode section includes an alloy containing the first metal including Au and a second metal including Sn or Zn,

the second interconnect section includes a third metal including Au,

the second electrode section includes an alloy containing the third metal including Au and a fourth metal including Sn or Zn, and

the first metal and the third metal include an identical element.

19. The electronic equipment according to claim 18 , wherein the second metal and the fourth metal include an identical element.

20. The electronic equipment according to claim 11 , further comprising:

a first substrate; and

a second substrate disposed to face one surface of the first substrate,

wherein the first electrode section is provided on one surface side of the first substrate, and

wherein the second electrode section is provided on a surface side of the second substrate facing the first substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 19, 2021
From: HASHIGUCHI, HIDETO
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 056285/0638 →
Priority Claims (1)
JP 2018-227349 · Dec 4, 2018 · national
Continuity (1)
Related Publication 20220005860A1 · Jan 6, 2022
References Cited (31)
US 10504852B1 · Chen · 2019 [cited by examiner]
US 20060128148A1 · Takahashi · 2006 [cited by applicant]
US 20090194889A1 · Jeng · 2009 [cited by examiner]
US 20100259662A1 · Oike · 2010 [cited by examiner]
US 20110260184A1 · Furuyama · 2011 [cited by examiner]
US 20120199930A1 · Hayashi · 2012 [cited by examiner]
US 20120211892A1 · Kim · 2012 [cited by examiner]
US 20120228771A1 · Edelstein · 2012 [cited by applicant]
US 20130112849A1 · Shimotsusa · 2013 [cited by applicant]
US 20140077057A1 · Chao · 2014 [cited by examiner]
US 20140131874A1 · Kagawa · 2014 [cited by examiner]
US 20150205041A1 · Neelakantan · 2015 [cited by examiner]
US 20160284753A1 · Komai · 2016 [cited by examiner]
US 20160358859A1 · Murray · 2016 [cited by examiner]
US 20170062366A1 · Enquist · 2017 [cited by examiner]
US 20180240859A1 · Yang · 2018 [cited by examiner]
US 20180342452A1 · Kim · 2018 [cited by examiner]
US 20190393159A1 · Chen · 2019 [cited by examiner]
CN 101114612 · 2008 [cited by applicant]
CN 101615608 · 2009 [cited by applicant]
CN 102693992 · 2012 [cited by applicant]
CN 108140559 · 2018 [cited by applicant]
CN 108701697A · 2018 [cited by applicant]
JP H08236001 · 1996 [cited by applicant]
JP 2012204501 · 2012 [cited by applicant]
JP 2012256736 · 2012 [cited by applicant]
JP 2018528622 · 2018 [cited by applicant]
KR 20050030709A · 2005 [cited by applicant]
International Search Report prepared by the Japan Patent Office on Nov. 28, 2019, for International Application No. PCT/JP2019/041079. [cited by applicant]
Official Action for China Patent Application No. 201980030713.3, dated Nov. 22, 2023, 19 pages. [cited by applicant]
Zhu Zhen, Tianjin, “Resource utilization technology of exhaust gas machine electronic appliances”, Jan. 31, 2018, pp. 46-48, Science and Technology Press. [cited by applicant]