IP Library › Granted Patent US 12,547,808
Granted Patent B2
US 12,547,808 · App. 17/427,096 · Granted Feb 10, 2026

Method and device for designing gate driving circuit, and controller

Inventors: Siyang Liu (Shenzhen, CN); Zui Wang (Shenzhen, CN)
Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
G06F30/392G06F2111/20G06F2117/12
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Quick Facts
Patent No.
US 12,547,808
App. No.
17/427,096
Granted
Feb 10, 2026
Kind
B2
Abstract

The present application provides a method and a device for designing a gate driving circuit, a controller, and a storage medium. The method includes: acquiring size information of a target panel and determining location information of a target area according to the size information of the target panel; calling and combining size information of a standard panel, characteristic label information of a plurality of standard devices, and an architecture type identifier acquired to determine characteristic label information of at least one target device, in order to generate a target gate driving circuit in the target area.

Claims (48)

1 . A method for designing a gate driving circuit, which comprises:

acquiring layout information of a target panel, wherein the layout information comprises size information and an architecture type identifier of the target panel;

determining location information of a target area in the target panel according to the size information of the target panel;

calling a standard database, wherein the standard database stores size information of a standard panel and characteristic label information of a plurality of standard devices;

determining characteristic label information of at least one target device based on the size information and the architecture identifier of the target panel according to the size information of the standard panel and the characteristic label information of at least one of the standard devices; and

generating a target gate driving circuit in the target area according to the characteristic label information of the at least one target device and the architecture type identifier.

2 . The method for designing the gate driving circuit according to claim 1 , wherein the step of determining the characteristic label information of the at least one target device based on the size information and the architecture type identifier of the target panel according to the size information of the standard panel and the characteristic label information of the at least one of the standard devices comprises:

determining characteristic label information of at least one reference device from the characteristic label information of the plurality of standard devices according to the architecture type identifier; and

determining the characteristic label information of the at least one target device based on the size information of the target panel according to the size information of the standard panel and the characteristic label information of the at least one reference device.

3 . The method for designing the gate driving circuit according to claim 2 , wherein the characteristic label information of the standard devices comprises size information of the standard devices, the size information of the standard devices comprises size information of the reference device, the characteristic label information of the target device comprises size information of the target device, and the size information of the reference device is configured to determine the size information of the target device.

4 . The method for designing the gate driving circuit according to claim 3 , wherein size information of a plurality of reference devices comprises thin film transistor (TFT) size and boost capacitor (Cboost);

wherein a gate driving circuit of the standard panel comprises a plurality of thin film transistors electrically connected, wherein the TFT size is a size of any one of the thin film transistors, the TFT size comprises TFT Width, and the TFT Width is a channel width value of a corresponding thin film transistor, and the Cboost is a size of a bootstrap capacitor in the gate driving circuit of the standard panel.

5 . The method for designing the gate driving circuit according to claim 3 , wherein the target gate driving circuit comprises a plurality of target devices, and the plurality of target devices comprise a first target device and a second target device; and

the step of determining the characteristic label information of the at least one target device based on the size information and the architecture type identifier of the target panel according to the size information of the standard panel and the characteristic label information of the at least one of the standard devices comprises:

determining size information of the first target device based on the size information of the target panel according to the size information of the standard panel and the size information of one reference device; and

determining size information of the second target device according to the size information of the first target device based on a preset rule.

6 . The method for designing the gate driving circuit according to claim 5 , wherein in the second target device and the first target device, preset rules of size information of different parts are the same or different.

7 . The method for designing the gate driving circuit according to claim 1 , wherein the target gate driving circuit further comprises at least one fixing device, and the step of generating the target gate driving circuit in the target area according to the characteristic label information of the at least one target device and the architecture type identifier comprises:

determining characteristic label information of the at least one fixing device from the characteristic label information of the plurality of standard devices according to the architecture type identifier; and

generating the target gate driving circuit in the target area according to the characteristic label information of the at least one target device, the architecture type identifier, and the characteristic label information of the at least one fixing device.

8 . The method for designing the gate driving circuit according to claim 7 , wherein the characteristic label information of the at least one fixing device comprises TFT channel length, drain width, source width, and source to gate space;

wherein a gate driving circuit of the standard panel comprises a plurality of thin film transistors electrically connected, wherein the TFT channel length is a channel length of any one of the thin film transistors, the drain width is a width of a drain of any one of the thin film transistors, the source width is a width of a source of any one of the thin film transistors, and the source to gate space is a horizontal interval between the source and a gate of any one of the thin film transistors.

9 . A device for designing a gate driving circuit, which comprises:

an acquiring module configured to acquire layout information of a target panel, wherein the layout information comprises size information and an architecture type identifier of the target panel;

a first determining module configured to determine location information of a target area in the target panel according to the size information of the target panel;

a calling module configured to call a standard database, wherein the standard database stores size information of a standard panel and characteristic label information of a plurality of standard devices;

a second determining module configured to determine characteristic label information of at least one target device based on the size information and the architecture type identifier of the target panel according to the size information of the standard panel and the characteristic label information of at least one of the standard devices; and

a generating module configured to generate a target gate driving circuit in the target area according to the characteristic label information of the at least one target device and the architecture type identifier.

10 . The device for designing the gate driving circuit according to claim 9 , wherein the second determining module comprises:

a first sub-determining module configured to determine characteristic label information of at least one reference device from the characteristic label information of the plurality of standard devices according to the architecture type identifier; and

a second sub-determining module configured to determine the characteristic label information of the at least one target device based on the size information of the target panel according to the size information of the standard panel and the characteristic label information of the at least one reference device.

11 . The device for designing the gate driving circuit according to claim 10 , wherein the characteristic label information of the standard devices comprises size information of the standard devices, and the size information of the standard devices comprises the size information of the reference device, the characteristic label information of the target device comprises size information of the target device, and the size information of the reference device is used to determine the size information of the target device, and wherein the second determining module further comprises:

a third sub-determining module configured to determine the size information of the at least one reference device from the size information of the plurality of standard devices according to the architecture type identifier; and

a fourth sub-determining module configured to determine the size information of the at least one target device based on the size information and the architecture identifier of the target panel according to the size information of the standard panel and the size information of the at least one reference device.

12 . A controller, wherein the controller is configured to execute a number of instructions stored in a memory to implement a method for designing a gate driving circuit, and the method comprises:

acquiring layout information of a target panel, wherein the layout information comprises size information and an architecture type identifier of the target panel;

determining location information of a target area in the target panel according to the size information of the target panel;

calling a standard database, wherein the standard database stores size information of a standard panel and characteristic label information of a plurality of standard devices;

determining characteristic label information of at least one target device based on the size information and the architecture type identifier of the target panel according to the size information of the standard panel and the characteristic label information of at least one of the standard devices; and

generating a target gate driving circuit in the target area according to the characteristic label information of the at least one target device and the architecture type identifier.

13 . The controller according to claim 12 , wherein the step of determining the characteristic label information of the at least one target device based on the size information and the architecture type identifier of the target panel according to the size information of the standard panel and the characteristic label information of the at least one of the standard devices comprises:

determining characteristic label information of at least one reference device from the characteristic label information of the plurality of standard devices according to the architecture type identifier; and

determining the characteristic label information of the at least one target device based on the size information of the target panel according to the size information of the standard panel and the characteristic label information of the at least one reference device.

14 . The controller according to claim 13 , wherein the characteristic label information of the standard devices comprises size information of the standard devices, the size information of the standard devices comprises size information of the reference device, the characteristic label information of the target device comprises size information of the target device, and the size information of the reference device is configured to determine the size information of the target device.

15 . The controller according to claim 14 , wherein the target gate driving circuit comprises a plurality of target devices, and the plurality of target devices comprise a first target device and a second target device; and

the step of determining the characteristic label information of the at least one target device based on the size information and the architecture type identifier of the target panel according to the size information of the standard panel and the characteristic label information of the at least one of the standard devices comprises:

determining size information of the first target device based on the size information of the target panel according to the size information of the standard panel and the size information of one reference device; and

determining size information of the second target device according to the size information of the first target device based on a preset rule.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2021
From: LIU, SIYANG
To: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
Reel/Frame 057388/0729 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2021
From: LIU, SIYANG; WANG, ZUI
To: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
Reel/Frame 057388/0745 →
Priority Claims (1)
CN 202110717137.9 · Jun 28, 2021 · national
Continuity (1)
Related Publication 20240046019A1 · Feb 8, 2024
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