Dual strained semiconductor substrate and patterning
A dielectric layer is on top of a first semiconductor stack. The first semiconductor stack is compressively strained. A second semiconductor stack is on top of the dielectric layer. The second semiconductor stack is tensely strained.
1. A semiconductor structure comprising:
a dielectric layer on top of a first semiconductor stack, wherein the first semiconductor stack is compressively strained, and wherein the first semiconductor stack comprises Silicon Germanium (SiGe); and
a second semiconductor stack on top of the dielectric layer, wherein the second semiconductor stack is tensely strained.
2. The semiconductor structure of claim 1 , wherein the second semiconductor stack comprises Silicon.
3. The semiconductor structure of claim 1 , wherein the first semiconductor stack comprises two or more alternating layers of Silicon Germanium (SiGe) and a substrate.
4. The semiconductor structure of claim 1 , wherein the second semiconductor stack comprises two or more alternating layers of a Silicon Germanium (SiGe) layer and a Silicon layer.
5. The semiconductor structure of claim 1 , wherein a first liner is located between and in contact with the dielectric layer and the first semiconductor stack and wherein a second liner is located between and in contact with the dielectric layer and the second semiconductor stack.
6. A semiconductor structure comprising:
a first silicon germanium (SiGe) layer on top of and in contact with a substrate;
a first liner layer on top of and in contact with the first SiGe layer;
a first dielectric layer on top of and in contact with the first liner layer;
a second liner layer on top of and in contact with the first dielectric layer;
a second dielectric layer on top of and in contact with the second liner layer; and
a second silicon germanium (SiGe) layer on top of and in contact with the second dielectric layer.
7. The semiconductor structure of claim 6 , further comprising:
a third dielectric layer surrounding and in contact with at least a portion of the substrate.
8. The semiconductor structure of claim 6 , wherein the first SiGe layer is compressively strained.
9. The semiconductor structure of claim 6 , wherein the second SiGe layer is relaxed.
10. The semiconductor structure of claim 6 , wherein the first SiGe layer is 25% Germanium.